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Kyösti Mälkki191d2212014-06-15 12:06:12 +03001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2013 Vladimir Serbinenko.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Kyösti Mälkki191d2212014-06-15 12:06:12 +030014 */
15
16#define __SIMPLE_DEVICE__
17
18#include <arch/io.h>
19#include <cbmem.h>
Kyösti Mälkkia4ffe9d2016-06-27 13:24:11 +030020#include <cpu/intel/romstage.h>
Kyösti Mälkki191d2212014-06-15 12:06:12 +030021#include "nehalem.h"
22
Kyösti Mälkkif1e3c762014-12-22 12:28:07 +020023static uintptr_t smm_region_start(void)
Kyösti Mälkki191d2212014-06-15 12:06:12 +030024{
25 /* Base of TSEG is top of usable DRAM */
Kyösti Mälkkif1e3c762014-12-22 12:28:07 +020026 uintptr_t tom = pci_read_config32(PCI_DEV(0,0,0), TSEG);
27 return tom;
28}
29
30void *cbmem_top(void)
31{
32 return (void *) smm_region_start();
Kyösti Mälkki191d2212014-06-15 12:06:12 +030033}
Kyösti Mälkkia4ffe9d2016-06-27 13:24:11 +030034
35void *setup_stack_and_mtrrs(void)
36{
37 return (void*)CONFIG_RAMTOP;
38}