Tobias Diedrich | 8b3cac2 | 2010-11-09 22:18:28 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2004 Nick Barker <Nick.Barker9@btinternet.com> |
| 5 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> |
| 6 | * Copyright (C) 2007-2009 coresystems GmbH |
| 7 | * Copyright (C) 2010 Advanced Micro Devices, Inc. |
| 8 | * Copyright (C) 2010 Tobias Diedrich <ranma+coreboot@tdiedrich.de> |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * ISA portions taken from QEMU acpi-dsdt.dsl. |
| 26 | */ |
| 27 | |
| 28 | #define LNKA INTA |
| 29 | #define LNKB INTB |
| 30 | #define LNKC INTC |
| 31 | #define LNKD INTD |
| 32 | |
| 33 | /* |
| 34 | * For simplicity map LNK[E-H] to LNK[A-D]. |
| 35 | * This also means we are 82C596 compatible. |
| 36 | * Needs 0:11.0 0x46[4] set to 0. |
| 37 | */ |
| 38 | #define LNKE INTA |
| 39 | #define LNKF INTB |
| 40 | #define LNKG INTC |
| 41 | #define LNKH INTD |
| 42 | |
| 43 | DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1) |
| 44 | { |
| 45 | Name(APIC, 0) // 0=>8259, 1=>IOAPIC |
| 46 | |
| 47 | /* The _PIC method is called by the OS to choose between interrupt |
| 48 | * routing via the i8259 interrupt controller or the APIC. |
| 49 | * |
| 50 | * _PIC is called with a parameter of 0 for i8259 configuration and |
| 51 | * with a parameter of 1 for Local Apic/IOAPIC configuration. |
| 52 | */ |
| 53 | |
| 54 | Method(_PIC, 1) |
| 55 | { |
| 56 | // Remember the OS' IRQ routing choice. |
| 57 | Store(Arg0, APIC) |
| 58 | } |
| 59 | |
| 60 | /* _PR CPU0 is dynamically supplied by SSDT */ |
| 61 | |
| 62 | /* For now only define 2 power states: |
| 63 | * - S0 which is fully on |
| 64 | * - S5 which is soft off |
| 65 | * Any others would involve declaring the wake up methods. |
| 66 | * |
| 67 | * Package contents: |
| 68 | * ofs len desc |
| 69 | * 0 1 Value for PM1a_CNT.SLP_TYP register to enter this system state. |
| 70 | * 1 1 Value for PM1b_CNT.SLP_TYP register to enter this system state. To enter any |
| 71 | * given state, OSPM must write the PM1a_CNT.SLP_TYP register before the |
| 72 | * PM1b_CNT.SLP_TYP register. |
| 73 | * 2 2 Reserved |
| 74 | */ |
| 75 | Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) |
| 76 | Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 }) |
| 77 | |
| 78 | /* Root of the bus hierarchy */ |
| 79 | Scope (\_SB) |
| 80 | { |
| 81 | /* Top PCI device */ |
| 82 | Device (PCI0) |
| 83 | { |
| 84 | Name (_HID, EisaId ("PNP0A03")) |
| 85 | Name (_ADR, 0x00180000) |
| 86 | Name (_BBN, 0x00) |
| 87 | |
| 88 | Name (APRT, Package() { |
| 89 | /* AGP? */ |
| 90 | Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x10 }, |
| 91 | Package (0x04) { 0x0001FFFF, 0x01, 0x00, 0x11 }, |
| 92 | Package (0x04) { 0x0001FFFF, 0x02, 0x00, 0x12 }, |
| 93 | Package (0x04) { 0x0001FFFF, 0x03, 0x00, 0x13 }, |
| 94 | /* PCIe graphics bridge */ |
| 95 | Package (0x04) { 0x0002FFFF, 0x00, 0x00, 0x1B }, |
| 96 | Package (0x04) { 0x0002FFFF, 0x01, 0x00, 0x1B }, |
| 97 | Package (0x04) { 0x0002FFFF, 0x02, 0x00, 0x1B }, |
| 98 | Package (0x04) { 0x0002FFFF, 0x03, 0x00, 0x1B }, |
| 99 | /* PCIe bridge */ |
| 100 | Package (0x04) { 0x0003FFFF, 0x00, 0x00, 0x1F }, |
| 101 | Package (0x04) { 0x0003FFFF, 0x01, 0x00, 0x23 }, |
| 102 | Package (0x04) { 0x0003FFFF, 0x02, 0x00, 0x27 }, |
| 103 | Package (0x04) { 0x0003FFFF, 0x03, 0x00, 0x2B }, |
| 104 | /* SATA */ |
| 105 | Package (0x04) { 0x000FFFFF, 0x01, 0x00, 0x15 }, |
| 106 | /* IDE */ |
| 107 | Package (0x04) { 0x000FFFFF, 0x00, 0x00, 0x15 }, |
| 108 | /* USB */ |
| 109 | Package (0x04) { 0x0010FFFF, 0x00, 0x00, 0x14 }, |
| 110 | Package (0x04) { 0x0010FFFF, 0x01, 0x00, 0x16 }, |
| 111 | Package (0x04) { 0x0010FFFF, 0x02, 0x00, 0x15 }, |
| 112 | Package (0x04) { 0x0010FFFF, 0x03, 0x00, 0x17 }, |
| 113 | /* PCI bridge */ |
| 114 | Package (0x04) { 0x0013FFFF, 0x00, 0x00, 0x14 }, |
| 115 | Package (0x04) { 0x0013FFFF, 0x01, 0x00, 0x14 }, |
| 116 | Package (0x04) { 0x0013FFFF, 0x02, 0x00, 0x14 }, |
| 117 | Package (0x04) { 0x0013FFFF, 0x03, 0x00, 0x14 }, |
| 118 | }) |
| 119 | Name (PPRT, Package() { |
| 120 | /* ?? */ |
| 121 | Package (0x04) { 0x0001FFFF, 0x00, LNKA, 0x00 }, |
| 122 | Package (0x04) { 0x0001FFFF, 0x01, LNKB, 0x00 }, |
| 123 | Package (0x04) { 0x0001FFFF, 0x02, LNKC, 0x00 }, |
| 124 | Package (0x04) { 0x0001FFFF, 0x03, LNKD, 0x00 }, |
| 125 | /* PCIe graphics bridge */ |
| 126 | Package (0x04) { 0x0002FFFF, 0x00, LNKH, 0x00 }, |
| 127 | Package (0x04) { 0x0002FFFF, 0x01, LNKH, 0x00 }, |
| 128 | Package (0x04) { 0x0002FFFF, 0x02, LNKH, 0x00 }, |
| 129 | Package (0x04) { 0x0002FFFF, 0x03, LNKH, 0x00 }, |
| 130 | /* PCIe bridge */ |
| 131 | Package (0x04) { 0x0003FFFF, 0x00, LNKH, 0x00 }, |
| 132 | Package (0x04) { 0x0003FFFF, 0x01, LNKH, 0x00 }, |
| 133 | Package (0x04) { 0x0003FFFF, 0x02, LNKH, 0x00 }, |
| 134 | Package (0x04) { 0x0003FFFF, 0x03, LNKH, 0x00 }, |
| 135 | /* SATA */ |
| 136 | Package (0x04) { 0x000FFFFF, 0x01, LNKB, 0x00 }, |
| 137 | /* USB */ |
| 138 | Package (0x04) { 0x0010FFFF, 0x00, LNKA, 0x00 }, |
| 139 | Package (0x04) { 0x0010FFFF, 0x01, LNKB, 0x00 }, |
| 140 | Package (0x04) { 0x0010FFFF, 0x02, LNKC, 0x00 }, |
| 141 | Package (0x04) { 0x0010FFFF, 0x03, LNKD, 0x00 }, |
| 142 | /* PCI bridge */ |
| 143 | Package (0x04) { 0x0013FFFF, 0x00, LNKD, 0x00 }, |
| 144 | Package (0x04) { 0x0013FFFF, 0x01, LNKD, 0x00 }, |
| 145 | Package (0x04) { 0x0013FFFF, 0x02, LNKD, 0x00 }, |
| 146 | Package (0x04) { 0x0013FFFF, 0x03, LNKD, 0x00 }, |
| 147 | }) |
| 148 | |
| 149 | /* PCI Routing Table */ |
| 150 | Method (_PRT, 0, NotSerialized) |
| 151 | { |
| 152 | If (APIC) |
| 153 | { |
| 154 | Return (APRT) |
| 155 | } |
| 156 | Return (PPRT) |
| 157 | } |
| 158 | |
| 159 | Device (PEGG) |
| 160 | { |
| 161 | Name (_ADR, 0x00020000) |
| 162 | Name (APRT, Package () { |
| 163 | Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x18 }, /* PCIE IRQ24-IRQ27 */ |
| 164 | Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x19 }, |
| 165 | Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1A }, |
| 166 | Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1B }, |
| 167 | }) |
| 168 | Name (PPRT, Package () { |
| 169 | Package (0x04) { 0x0000FFFF, 0x00, LNKH, 0x00 }, |
| 170 | Package (0x04) { 0x0000FFFF, 0x01, LNKH, 0x00 }, |
| 171 | Package (0x04) { 0x0000FFFF, 0x02, LNKH, 0x00 }, |
| 172 | Package (0x04) { 0x0000FFFF, 0x03, LNKH, 0x00 }, |
| 173 | }) |
| 174 | Method (_PRT, 0, NotSerialized) |
| 175 | { |
| 176 | If (APIC) |
| 177 | { |
| 178 | Return (APRT) |
| 179 | } |
| 180 | Return (PPRT) |
| 181 | } |
| 182 | } |
| 183 | |
| 184 | Device (PEX0) |
| 185 | { |
| 186 | Name (_ADR, 0x00030000) |
| 187 | Name (APRT, Package () { |
| 188 | Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x1C }, /* PCIE IRQ28-IRQ31 */ |
| 189 | Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x1D }, |
| 190 | Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x1E }, |
| 191 | Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x1F }, |
| 192 | }) |
| 193 | Name (PPRT, Package () { |
| 194 | Package (0x04) { 0x0000FFFF, 0x00, LNKH, 0x00 }, |
| 195 | Package (0x04) { 0x0000FFFF, 0x01, LNKH, 0x00 }, |
| 196 | Package (0x04) { 0x0000FFFF, 0x02, LNKH, 0x00 }, |
| 197 | Package (0x04) { 0x0000FFFF, 0x03, LNKH, 0x00 }, |
| 198 | }) |
| 199 | Method (_PRT, 0, NotSerialized) |
| 200 | { |
| 201 | If (APIC) |
| 202 | { |
| 203 | Return (APRT) |
| 204 | } |
| 205 | Return (PPRT) |
| 206 | } |
| 207 | } |
| 208 | |
| 209 | Device (PEX1) |
| 210 | { |
| 211 | Name (_ADR, 0x00030001) |
| 212 | Name (APRT, Package () { |
| 213 | Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x20 }, /* PCIE IRQ32-IRQ35 */ |
| 214 | Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x21 }, |
| 215 | Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x22 }, |
| 216 | Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x23 }, |
| 217 | }) |
| 218 | Name (PPRT, Package () { |
| 219 | Package (0x04) { 0x0000FFFF, 0x00, LNKH, 0x00 }, |
| 220 | Package (0x04) { 0x0000FFFF, 0x01, LNKH, 0x00 }, |
| 221 | Package (0x04) { 0x0000FFFF, 0x02, LNKH, 0x00 }, |
| 222 | Package (0x04) { 0x0000FFFF, 0x03, LNKH, 0x00 }, |
| 223 | }) |
| 224 | Method (_PRT, 0, NotSerialized) |
| 225 | { |
| 226 | If (APIC) |
| 227 | { |
| 228 | Return (APRT) |
| 229 | } |
| 230 | Return (PPRT) |
| 231 | } |
| 232 | } |
| 233 | |
| 234 | Device (PEX2) |
| 235 | { |
| 236 | Name (_ADR, 0x00030002) |
| 237 | Name (APRT, Package () { |
| 238 | Package (0x04) { 0x0000FFFF, 0x00, 0x00, 0x24 }, /* PCIE IRQ36-IRQ39 */ |
| 239 | Package (0x04) { 0x0000FFFF, 0x01, 0x00, 0x25 }, |
| 240 | Package (0x04) { 0x0000FFFF, 0x02, 0x00, 0x26 }, |
| 241 | Package (0x04) { 0x0000FFFF, 0x03, 0x00, 0x27 }, |
| 242 | }) |
| 243 | Name (PPRT, Package () { |
| 244 | Package (0x04) { 0x0000FFFF, 0x00, LNKH, 0x00 }, |
| 245 | Package (0x04) { 0x0000FFFF, 0x01, LNKH, 0x00 }, |
| 246 | Package (0x04) { 0x0000FFFF, 0x02, LNKH, 0x00 }, |
| 247 | Package (0x04) { 0x0000FFFF, 0x03, LNKH, 0x00 }, |
| 248 | }) |
| 249 | Method (_PRT, 0, NotSerialized) |
| 250 | { |
| 251 | If (APIC) |
| 252 | { |
| 253 | Return (APRT) |
| 254 | } |
| 255 | Return (PPRT) |
| 256 | } |
| 257 | } |
| 258 | |
| 259 | Device (PCI6) |
| 260 | { |
| 261 | Name (_ADR, 0x00130000) |
| 262 | Name (APRT, Package () { |
| 263 | Package (0x04) { 0x0001FFFF, 0x00, 0x00, 0x11 }, /* IRQ17 */ |
| 264 | }) |
| 265 | Name (PPRT, Package () { |
| 266 | Package (0x04) { 0x0001FFFF, 0x00, LNKB, 0x00 }, |
| 267 | }) |
| 268 | Method (_PRT, 0, NotSerialized) |
| 269 | { |
| 270 | If (APIC) |
| 271 | { |
| 272 | Return (APRT) |
| 273 | } |
| 274 | Return (PPRT) |
| 275 | } |
| 276 | } |
| 277 | |
| 278 | Device (PCI7) |
| 279 | { |
| 280 | Name (_ADR, 0x00130001) |
| 281 | Name (APRT, Package () { |
| 282 | /* PCI slot 1 */ |
| 283 | Package (0x04) { 0x0006FFFF, 0x00, 0x00, 0x10 }, |
| 284 | Package (0x04) { 0x0006FFFF, 0x01, 0x00, 0x11 }, |
| 285 | Package (0x04) { 0x0006FFFF, 0x02, 0x00, 0x12 }, |
| 286 | Package (0x04) { 0x0006FFFF, 0x03, 0x00, 0x13 }, |
| 287 | |
| 288 | /* PCI slot 2 */ |
| 289 | Package (0x04) { 0x0007FFFF, 0x00, 0x00, 0x11 }, |
| 290 | Package (0x04) { 0x0007FFFF, 0x01, 0x00, 0x12 }, |
| 291 | Package (0x04) { 0x0007FFFF, 0x02, 0x00, 0x13 }, |
| 292 | Package (0x04) { 0x0007FFFF, 0x03, 0x00, 0x10 }, |
| 293 | |
| 294 | /* PCI slot 3 */ |
| 295 | Package (0x04) { 0x0008FFFF, 0x00, 0x00, 0x12 }, |
| 296 | Package (0x04) { 0x0008FFFF, 0x01, 0x00, 0x13 }, |
| 297 | Package (0x04) { 0x0008FFFF, 0x02, 0x00, 0x10 }, |
| 298 | Package (0x04) { 0x0008FFFF, 0x03, 0x00, 0x11 }, |
| 299 | |
| 300 | /* PCI slot 4 */ |
| 301 | Package (0x04) { 0x0009FFFF, 0x00, 0x00, 0x13 }, |
| 302 | Package (0x04) { 0x0009FFFF, 0x01, 0x00, 0x10 }, |
| 303 | Package (0x04) { 0x0009FFFF, 0x02, 0x00, 0x11 }, |
| 304 | Package (0x04) { 0x0009FFFF, 0x03, 0x00, 0x12 }, |
| 305 | }) |
| 306 | Name (PPRT, Package () { |
| 307 | /* PCI slot 1 */ |
| 308 | Package (0x04) { 0x0006FFFF, 0x00, LNKA, 0x00 }, |
| 309 | Package (0x04) { 0x0006FFFF, 0x01, LNKB, 0x00 }, |
| 310 | Package (0x04) { 0x0006FFFF, 0x02, LNKC, 0x00 }, |
| 311 | Package (0x04) { 0x0006FFFF, 0x03, LNKD, 0x00 }, |
| 312 | |
| 313 | /* PCI slot 2 */ |
| 314 | Package (0x04) { 0x0007FFFF, 0x00, LNKB, 0x00 }, |
| 315 | Package (0x04) { 0x0007FFFF, 0x01, LNKC, 0x00 }, |
| 316 | Package (0x04) { 0x0007FFFF, 0x02, LNKD, 0x00 }, |
| 317 | Package (0x04) { 0x0007FFFF, 0x03, LNKA, 0x00 }, |
| 318 | |
| 319 | /* PCI slot 3 */ |
| 320 | Package (0x04) { 0x0008FFFF, 0x00, LNKC, 0x00 }, |
| 321 | Package (0x04) { 0x0008FFFF, 0x01, LNKD, 0x00 }, |
| 322 | Package (0x04) { 0x0008FFFF, 0x02, LNKA, 0x00 }, |
| 323 | Package (0x04) { 0x0008FFFF, 0x03, LNKB, 0x00 }, |
| 324 | |
| 325 | /* PCI slot 4 */ |
| 326 | Package (0x04) { 0x0009FFFF, 0x00, LNKD, 0x00 }, |
| 327 | Package (0x04) { 0x0009FFFF, 0x01, LNKA, 0x00 }, |
| 328 | Package (0x04) { 0x0009FFFF, 0x02, LNKB, 0x00 }, |
| 329 | Package (0x04) { 0x0009FFFF, 0x03, LNKC, 0x00 }, |
| 330 | }) |
| 331 | |
| 332 | Method (_PRT, 0, NotSerialized) |
| 333 | { |
| 334 | If (APIC) |
| 335 | { |
| 336 | Return (APRT) |
| 337 | } |
| 338 | Return (PPRT) |
| 339 | } |
| 340 | } |
| 341 | |
| 342 | Device (SBRG) { /* southbridge */ |
| 343 | Name (_ADR, 0x00110000) |
| 344 | |
| 345 | /* PS/2 keyboard (seems to be important for WinXP install) */ |
| 346 | Device (KBD) |
| 347 | { |
| 348 | Name (_HID, EisaId ("PNP0303")) |
| 349 | Method (_STA, 0, NotSerialized) |
| 350 | { |
| 351 | Return (0x0f) |
| 352 | } |
| 353 | Method (_CRS, 0, NotSerialized) |
| 354 | { |
| 355 | Name (TMP, ResourceTemplate () { |
| 356 | IO (Decode16, 0x0060, 0x0060, 0x01, 0x01) |
| 357 | IO (Decode16, 0x0064, 0x0064, 0x01, 0x01) |
| 358 | IRQNoFlags () {1} |
| 359 | }) |
| 360 | Return (TMP) |
| 361 | } |
| 362 | } |
| 363 | |
| 364 | /* PS/2 mouse */ |
| 365 | Device (MOU) |
| 366 | { |
| 367 | Name (_HID, EisaId ("PNP0F13")) |
| 368 | Method (_STA, 0, NotSerialized) |
| 369 | { |
| 370 | Return (0x0f) |
| 371 | } |
| 372 | Method (_CRS, 0, NotSerialized) |
| 373 | { |
| 374 | Name (TMP, ResourceTemplate () { |
| 375 | IRQNoFlags () {12} |
| 376 | }) |
| 377 | Return (TMP) |
| 378 | } |
| 379 | } |
| 380 | |
| 381 | /* Parallel port */ |
| 382 | Device (LPT0) |
| 383 | { |
| 384 | Name (_HID, EisaId ("PNP0401")) |
| 385 | Method (_STA, 0, NotSerialized) |
| 386 | { |
| 387 | Return (0x0f) |
| 388 | } |
| 389 | Method (_CRS, 0, NotSerialized) |
| 390 | { |
| 391 | Name (TMP, ResourceTemplate () { |
| 392 | IO (Decode16, 0x0378, 0x0378, 0x01, 0x08) |
| 393 | IO (Decode16, 0x0778, 0x0778, 0x01, 0x08) |
| 394 | IRQNoFlags () {7} |
| 395 | DMA (Compatibility, NotBusMaster, Transfer8) {3} |
| 396 | }) |
| 397 | Return (TMP) |
| 398 | } |
| 399 | } |
| 400 | } |
| 401 | |
| 402 | External(TOM1) /* top of memory below 4GB */ |
| 403 | |
| 404 | Method(_CRS, 0) { |
| 405 | Name(TMP, ResourceTemplate() { |
| 406 | WordBusNumber(ResourceProducer, MinFixed, MaxFixed, PosDecode, |
| 407 | 0x0000, // Granularity |
| 408 | 0x0000, // Range Minimum |
| 409 | 0x00FF, // Range Maximum |
| 410 | 0x0000, // Translation Offset |
| 411 | 0x0100, // Length |
| 412 | ,, |
| 413 | ) |
| 414 | IO(Decode16, 0x0CF8, 0x0CF8, 1, 8) |
| 415 | |
| 416 | WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 417 | 0x0000, /* address granularity */ |
| 418 | 0x0000, /* range minimum */ |
| 419 | 0x0CF7, /* range maximum */ |
| 420 | 0x0000, /* translation */ |
| 421 | 0x0CF8 /* length */ |
| 422 | ) |
| 423 | |
| 424 | WORDIO(ResourceProducer, MinFixed, MaxFixed, PosDecode, EntireRange, |
| 425 | 0x0000, /* address granularity */ |
| 426 | 0x0D00, /* range minimum */ |
| 427 | 0xFFFF, /* range maximum */ |
| 428 | 0x0000, /* translation */ |
| 429 | 0xF300 /* length */ |
| 430 | ) |
| 431 | |
| 432 | /* memory space for PCI BARs below 4GB */ |
| 433 | Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO) |
| 434 | }) |
| 435 | CreateDWordField(TMP, MMIO._BAS, MM1B) |
| 436 | CreateDWordField(TMP, MMIO._LEN, MM1L) |
| 437 | /* |
| 438 | * Declare memory between TOM1 and 4GB as available |
| 439 | * for PCI MMIO. |
| 440 | * |
| 441 | * Use ShiftLeft to avoid 64bit constant (for XP). |
| 442 | * This will work even if the OS does 32bit arithmetic, as |
| 443 | * 32bit (0x00000000 - TOM1) will wrap and give the same |
| 444 | * result as 64bit (0x100000000 - TOM1). |
| 445 | */ |
| 446 | Store(TOM1, MM1B) |
| 447 | ShiftLeft(0x10000000, 4, Local0) |
| 448 | Subtract(Local0, TOM1, Local0) |
| 449 | Store(Local0, MM1L) |
| 450 | |
| 451 | Return(TMP) |
| 452 | } |
| 453 | } |
| 454 | |
| 455 | OperationRegion (PCI0.SBRG.SBR1, PCI_Config, 0x55, 0x03) |
| 456 | Field (PCI0.SBRG.SBR1, ByteAcc, NoLock, Preserve) |
| 457 | { |
| 458 | /* |
| 459 | * Offset 0x55: |
| 460 | * 3-0: reserved |
| 461 | * 7-4: PCI INTA# routing |
| 462 | * Offset 0x56: |
| 463 | * 3-0: PCI INTB# routing |
| 464 | * 7-4: PCI INTC# routing |
| 465 | * Offset 0x57: |
| 466 | * 3-0: reserved |
| 467 | * 7-4: PCI INTD# routing |
| 468 | * |
| 469 | * Valid values for routing link: |
| 470 | * 0: disabled |
| 471 | * 2,8,13: reserved |
| 472 | * 1,3-7,9-12,14,15: corresponding irq |
| 473 | */ |
| 474 | , 4, |
| 475 | PINA, 4, |
| 476 | PINB, 4, |
| 477 | PINC, 4, |
| 478 | , 4, |
| 479 | PIND, 4, |
| 480 | } |
| 481 | |
| 482 | Name(IRQB, ResourceTemplate(){ |
| 483 | IRQ(Level,ActiveLow,Shared){15} |
| 484 | }) |
| 485 | |
| 486 | Name(IRQP, ResourceTemplate(){ |
| 487 | IRQ(Level,ActiveLow,Exclusive){3, 4, 5, 6, 7, 10, 11, 12} |
| 488 | }) |
| 489 | |
| 490 | /* adapted from ma78gm/dsdt.asl */ |
| 491 | #define PCI_INTX_DEV(intx, pinx, uid) \ |
| 492 | Device(intx) { \ |
| 493 | Name(_HID, EISAID("PNP0C0F")) \ |
| 494 | Name(_UID, uid) \ |
| 495 | \ |
| 496 | Method(_STA, 0) { \ |
| 497 | if (pinx) { \ |
| 498 | Return(0x0B) \ |
| 499 | } \ |
| 500 | Return(0x09) \ |
| 501 | } \ |
| 502 | \ |
| 503 | Method(_DIS ,0) { \ |
| 504 | Store(0, pinx) \ |
| 505 | } \ |
| 506 | \ |
| 507 | Method(_PRS ,0) { \ |
| 508 | Return(IRQP) \ |
| 509 | } \ |
| 510 | \ |
| 511 | Method(_CRS ,0) { \ |
| 512 | CreateWordField(IRQB, 1, IRQN) \ |
| 513 | ShiftLeft(1, pinx, IRQN) \ |
| 514 | Return(IRQB) \ |
| 515 | } \ |
| 516 | \ |
| 517 | Method(_SRS, 1) { \ |
| 518 | CreateWordField(ARG0, 1, IRQM) \ |
| 519 | \ |
| 520 | /* Use lowest available IRQ */ \ |
| 521 | FindSetRightBit(IRQM, Local0) \ |
| 522 | if (Local0) { \ |
| 523 | Decrement(Local0) \ |
| 524 | } \ |
| 525 | Store(Local0, pinx) \ |
| 526 | } \ |
| 527 | } \ |
| 528 | |
| 529 | PCI_INTX_DEV(INTA, PINA, 1) |
| 530 | PCI_INTX_DEV(INTB, PINB, 2) |
| 531 | PCI_INTX_DEV(INTC, PINC, 3) |
| 532 | PCI_INTX_DEV(INTD, PIND, 4) |
| 533 | } |
| 534 | } |