Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 2 | |
| 3 | #include <arch/ioapic.h> |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 4 | #include <console/console.h> |
Marc Jones | 8b522db | 2020-10-12 11:58:46 -0600 | [diff] [blame] | 5 | #include <console/debug.h> |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 6 | #include <cpu/x86/lapic.h> |
| 7 | #include <device/pci.h> |
Subrata Banik | 1366e44 | 2020-09-29 13:55:50 +0530 | [diff] [blame] | 8 | #include <intelblocks/lpc_lib.h> |
Andrey Petrov | 4e48ac0 | 2020-04-30 14:08:19 -0700 | [diff] [blame] | 9 | #include <intelblocks/p2sb.h> |
Jonathan Zhang | 3172f98 | 2020-05-28 17:53:48 -0700 | [diff] [blame] | 10 | #include <soc/acpi.h> |
Marc Jones | 1f50084 | 2020-10-15 14:32:51 -0600 | [diff] [blame] | 11 | #include <soc/chip_common.h> |
Andrey Petrov | 8670e82 | 2020-03-30 12:25:06 -0700 | [diff] [blame] | 12 | #include <soc/cpu.h> |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 13 | #include <soc/ramstage.h> |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 14 | #include <soc/soc_util.h> |
Marc Jones | 5851f9d | 2020-11-02 15:30:10 -0700 | [diff] [blame] | 15 | #include <soc/util.h> |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 16 | |
Marc Jones | b9365ef | 2020-10-11 15:00:36 -0600 | [diff] [blame] | 17 | /* UPD parameters to be initialized before SiliconInit */ |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 18 | void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) |
| 19 | { |
Marc Jones | b9365ef | 2020-10-11 15:00:36 -0600 | [diff] [blame] | 20 | mainboard_silicon_init_params(silupd); |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 21 | } |
| 22 | |
Jonathan Zhang | 1ba42a9 | 2020-09-21 17:14:44 -0700 | [diff] [blame] | 23 | #if CONFIG(HAVE_ACPI_TABLES) |
| 24 | static const char *soc_acpi_name(const struct device *dev) |
| 25 | { |
| 26 | if (dev->path.type == DEVICE_PATH_DOMAIN) |
| 27 | return "PC00"; |
| 28 | return NULL; |
| 29 | } |
| 30 | #endif |
| 31 | |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 32 | static struct device_operations pci_domain_ops = { |
| 33 | .read_resources = &pci_domain_read_resources, |
Marc Jones | 1f50084 | 2020-10-15 14:32:51 -0600 | [diff] [blame] | 34 | .set_resources = &xeonsp_pci_domain_set_resources, |
| 35 | .scan_bus = &xeonsp_pci_domain_scan_bus, |
Jonathan Zhang | 1ba42a9 | 2020-09-21 17:14:44 -0700 | [diff] [blame] | 36 | #if CONFIG(HAVE_ACPI_TABLES) |
Jonathan Zhang | 3172f98 | 2020-05-28 17:53:48 -0700 | [diff] [blame] | 37 | .write_acpi_tables = &northbridge_write_acpi_tables, |
Jonathan Zhang | 1ba42a9 | 2020-09-21 17:14:44 -0700 | [diff] [blame] | 38 | .acpi_name = soc_acpi_name |
| 39 | #endif |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 40 | }; |
| 41 | |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 42 | static struct device_operations cpu_bus_ops = { |
Nico Huber | 2f8ba69 | 2020-04-05 14:05:24 +0200 | [diff] [blame] | 43 | .read_resources = noop_read_resources, |
| 44 | .set_resources = noop_set_resources, |
Andrey Petrov | 8670e82 | 2020-03-30 12:25:06 -0700 | [diff] [blame] | 45 | .init = cpx_init_cpus, |
Jonathan Zhang | c110595 | 2020-06-03 15:55:28 -0700 | [diff] [blame] | 46 | .acpi_fill_ssdt = generate_cpu_entries, |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 47 | }; |
| 48 | |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 49 | struct pci_operations soc_pci_ops = { |
| 50 | .set_subsystem = pci_dev_set_subsystem, |
| 51 | }; |
| 52 | |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 53 | static void chip_enable_dev(struct device *dev) |
| 54 | { |
| 55 | /* Set the operations if it is a special bus type */ |
| 56 | if (dev->path.type == DEVICE_PATH_DOMAIN) { |
| 57 | dev->ops = &pci_domain_ops; |
| 58 | attach_iio_stacks(dev); |
| 59 | } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) { |
| 60 | dev->ops = &cpu_bus_ops; |
| 61 | } |
| 62 | } |
| 63 | |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 64 | static void chip_final(void *data) |
| 65 | { |
Andrey Petrov | 4e48ac0 | 2020-04-30 14:08:19 -0700 | [diff] [blame] | 66 | p2sb_hide(); |
Jonathan Zhang | bea1980 | 2020-04-13 19:34:53 -0700 | [diff] [blame] | 67 | |
| 68 | set_bios_init_completion(); |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 69 | } |
| 70 | |
| 71 | static void chip_init(void *data) |
| 72 | { |
| 73 | printk(BIOS_DEBUG, "coreboot: calling fsp_silicon_init\n"); |
| 74 | fsp_silicon_init(false); |
Subrata Banik | 1366e44 | 2020-09-29 13:55:50 +0530 | [diff] [blame] | 75 | pch_enable_ioapic(); |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 76 | setup_lapic(); |
Andrey Petrov | 4e48ac0 | 2020-04-30 14:08:19 -0700 | [diff] [blame] | 77 | p2sb_unhide(); |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 78 | } |
| 79 | |
| 80 | struct chip_operations soc_intel_xeon_sp_cpx_ops = { |
| 81 | CHIP_NAME("Intel Cooperlake-SP") |
| 82 | .enable_dev = chip_enable_dev, |
| 83 | .init = chip_init, |
Jonathan Zhang | 7919d61 | 2020-04-02 17:27:54 -0700 | [diff] [blame] | 84 | .final = chip_final, |
Andrey Petrov | 2e41075 | 2020-03-20 12:08:32 -0700 | [diff] [blame] | 85 | }; |