blob: 13b511ac7de39283895b3eeea589e13052018963 [file] [log] [blame]
Lee Leahy77ff0b12015-05-05 15:07:29 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2013 Google Inc.
Lee Leahy32471722015-04-20 15:20:28 -07005 * Copyright (C) 2015 Intel Corp.
Lee Leahy77ff0b12015-05-05 15:07:29 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Lee Leahy77ff0b12015-05-05 15:07:29 -070015 */
16
Lee Leahy32471722015-04-20 15:20:28 -070017#ifndef _SOC_SMM_H_
18#define _SOC_SMM_H_
Lee Leahy77ff0b12015-05-05 15:07:29 -070019
Lee Leahy32471722015-04-20 15:20:28 -070020#include <rules.h>
Lee Leahy77ff0b12015-05-05 15:07:29 -070021
Lee Leahy32471722015-04-20 15:20:28 -070022#if ENV_RAMSTAGE
Lee Leahy77ff0b12015-05-05 15:07:29 -070023#include <stdint.h>
24void southcluster_smm_clear_state(void);
25void southcluster_smm_enable_smi(void);
26void southcluster_smm_save_param(int param, uint32_t data);
27#endif
28
29enum {
30 SMM_SAVE_PARAM_GPIO_ROUTE = 0,
31 SMM_SAVE_PARAM_PCIE_WAKE_ENABLE,
32 SMM_SAVE_PARAM_COUNT
33};
34
Lee Leahy32471722015-04-20 15:20:28 -070035#endif /* _SOC_SMM_H_ */