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Lee Leahy77ff0b12015-05-05 15:07:29 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2013 Google Inc.
Lee Leahyb092c9e2016-01-01 18:09:50 -08005 * Copyright (C) 2015-2016 Intel Corp.
Lee Leahy77ff0b12015-05-05 15:07:29 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Lee Leahy77ff0b12015-05-05 15:07:29 -070015 */
16
Lee Leahy32471722015-04-20 15:20:28 -070017#ifndef _SOC_ROMSTAGE_H_
18#define _SOC_ROMSTAGE_H_
Lee Leahy77ff0b12015-05-05 15:07:29 -070019
20#include <stdint.h>
21#include <arch/cpu.h>
Lee Leahy94b856e2015-10-15 12:07:03 -070022#include <fsp/romstage.h>
Aaron Durbin789f2b62015-09-09 17:05:06 -050023#include <fsp/util.h>
Lee Leahy32471722015-04-20 15:20:28 -070024#include <soc/pei_data.h>
25#include <soc/pm.h>
Lee Leahy77ff0b12015-05-05 15:07:29 -070026
Lee Leahy77ff0b12015-05-05 15:07:29 -070027void gfx_init(void);
28void tco_disable(void);
29void punit_init(void);
Lee Leahy77ff0b12015-05-05 15:07:29 -070030int early_spi_read_wpsr(u8 *sr);
Lee Leahy32471722015-04-20 15:20:28 -070031void mainboard_fill_spd_data(struct pei_data *pei_data);
Aaron Durbincc5ac172015-09-30 09:12:57 -050032void set_max_freq(void);
Lee Leahy77ff0b12015-05-05 15:07:29 -070033
Lee Leahy32471722015-04-20 15:20:28 -070034/* romstage_common.c functions */
35void program_base_addresses(void);
Lee Leahy32471722015-04-20 15:20:28 -070036int chipset_prev_sleep_state(struct chipset_power_state *ps);
Lee Leahy77ff0b12015-05-05 15:07:29 -070037
Lee Leahy32471722015-04-20 15:20:28 -070038#endif /* _SOC_ROMSTAGE_H_ */