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Lee Leahy77ff0b12015-05-05 15:07:29 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2013 Google Inc.
Lee Leahy32471722015-04-20 15:20:28 -07005 * Copyright (C) 2015 Intel Corp.
Lee Leahy77ff0b12015-05-05 15:07:29 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Lee Leahy77ff0b12015-05-05 15:07:29 -070015 */
16
Lee Leahy32471722015-04-20 15:20:28 -070017#ifndef _SOC_PCI_DEVS_H_
18#define _SOC_PCI_DEVS_H_
Lee Leahy77ff0b12015-05-05 15:07:29 -070019
20/* All these devices live on bus 0 with the associated device and function */
21
22/* SoC transaction router */
23#define SOC_DEV 0x0
24#define SOC_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070025# define SOC_DEVID 0x2280
Lee Leahy77ff0b12015-05-05 15:07:29 -070026
27/* Graphics and Display */
28#define GFX_DEV 0x2
29#define GFX_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070030# define GFX_DEVID 0x22b1
31
32/* MMC Port */
33#define MMC_DEV 0x10
34#define MMC_FUNC 0
35# define MMC_DEVID 0x2294
Lee Leahy77ff0b12015-05-05 15:07:29 -070036
37/* SDIO Port */
38#define SDIO_DEV 0x11
39#define SDIO_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070040# define SDIO_DEVID 0x2295
Lee Leahy77ff0b12015-05-05 15:07:29 -070041
42/* SD Port */
43#define SD_DEV 0x12
44#define SD_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070045# define SD_DEVID 0x2296
Lee Leahy77ff0b12015-05-05 15:07:29 -070046
47/* SATA */
48#define SATA_DEV 0x13
49#define SATA_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070050#define AHCI1_DEVID 0x22a3
Lee Leahy77ff0b12015-05-05 15:07:29 -070051
52/* xHCI */
53#define XHCI_DEV 0x14
54#define XHCI_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070055#define XHCI_DEVID 0x22b5
Lee Leahy77ff0b12015-05-05 15:07:29 -070056
57/* LPE Audio */
58#define LPE_DEV 0x15
59#define LPE_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070060# define LPE_DEVID 0x22a8
Lee Leahy77ff0b12015-05-05 15:07:29 -070061
62/* Serial IO 1 */
63#define SIO1_DEV 0x18
64# define SIO_DMA1_DEV SIO1_DEV
65# define SIO_DMA1_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070066# define SIO_DMA1_DEVID 0x22c0
Lee Leahy77ff0b12015-05-05 15:07:29 -070067# define I2C1_DEV SIO1_DEV
68# define I2C1_FUNC 1
Lee Leahy32471722015-04-20 15:20:28 -070069# define I2C1_DEVID 0x22c1
Lee Leahy77ff0b12015-05-05 15:07:29 -070070# define I2C2_DEV SIO1_DEV
71# define I2C2_FUNC 2
Lee Leahy32471722015-04-20 15:20:28 -070072# define I2C2_DEVID 0x22c2
Lee Leahy77ff0b12015-05-05 15:07:29 -070073# define I2C3_DEV SIO1_DEV
74# define I2C3_FUNC 3
Lee Leahy32471722015-04-20 15:20:28 -070075# define I2C3_DEVID 0x22c3
Lee Leahy77ff0b12015-05-05 15:07:29 -070076# define I2C4_DEV SIO1_DEV
77# define I2C4_FUNC 4
Lee Leahy32471722015-04-20 15:20:28 -070078# define I2C4_DEVID 0x22c4
Lee Leahy77ff0b12015-05-05 15:07:29 -070079# define I2C5_DEV SIO1_DEV
80# define I2C5_FUNC 5
Lee Leahy32471722015-04-20 15:20:28 -070081# define I2C5_DEVID 0x22c5
Lee Leahy77ff0b12015-05-05 15:07:29 -070082# define I2C6_DEV SIO1_DEV
83# define I2C6_FUNC 6
Lee Leahy32471722015-04-20 15:20:28 -070084# define I2C6_DEVID 0x22c6
Lee Leahy77ff0b12015-05-05 15:07:29 -070085# define I2C7_DEV SIO1_DEV
86# define I2C7_FUNC 7
Lee Leahy32471722015-04-20 15:20:28 -070087# define I2C7_DEVID 0x22c7
Lee Leahy77ff0b12015-05-05 15:07:29 -070088
89/* Trusted Execution Engine */
90#define TXE_DEV 0x1a
91#define TXE_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070092# define TXE_DEVID 0x2298
Lee Leahy77ff0b12015-05-05 15:07:29 -070093
94/* HD Audio */
95#define HDA_DEV 0x1b
96#define HDA_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -070097# define HDA_DEVID 0x2284
Lee Leahy77ff0b12015-05-05 15:07:29 -070098
99/* PCIe Ports */
100#define PCIE_DEV 0x1c
101# define PCIE_PORT1_DEV PCIE_DEV
102# define PCIE_PORT1_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -0700103# define PCIE_PORT1_DEVID 0x22c8
Lee Leahy77ff0b12015-05-05 15:07:29 -0700104# define PCIE_PORT2_DEV PCIE_DEV
105# define PCIE_PORT2_FUNC 1
Lee Leahy32471722015-04-20 15:20:28 -0700106# define PCIE_PORT2_DEVID 0x22ca
Lee Leahy77ff0b12015-05-05 15:07:29 -0700107# define PCIE_PORT3_DEV PCIE_DEV
108# define PCIE_PORT3_FUNC 2
Lee Leahy32471722015-04-20 15:20:28 -0700109# define PCIE_PORT3_DEVID 0x22cc
Lee Leahy77ff0b12015-05-05 15:07:29 -0700110# define PCIE_PORT4_DEV PCIE_DEV
111# define PCIE_PORT4_FUNC 3
Lee Leahy32471722015-04-20 15:20:28 -0700112# define PCIE_PORT4_DEVID 0x22ce
113/* Total number of ROOT PORTS */
114#define MAX_ROOT_PORTS_BSW 4
Lee Leahy77ff0b12015-05-05 15:07:29 -0700115
116/* Serial IO 2 */
117#define SIO2_DEV 0x1e
118# define SIO_DMA2_DEV SIO2_DEV
119# define SIO_DMA2_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -0700120# define SIO_DMA2_DEVID 0x2286
Lee Leahy77ff0b12015-05-05 15:07:29 -0700121# define PWM1_DEV SIO2_DEV
122# define PWM1_FUNC 1
Lee Leahy32471722015-04-20 15:20:28 -0700123# define PWM1_DEVID 0x2288
Lee Leahy77ff0b12015-05-05 15:07:29 -0700124# define PWM2_DEV SIO2_DEV
125# define PWM2_FUNC 2
Lee Leahy32471722015-04-20 15:20:28 -0700126# define PWM2_DEVID 0x2289
Lee Leahy77ff0b12015-05-05 15:07:29 -0700127# define HSUART1_DEV SIO2_DEV
128# define HSUART1_FUNC 3
Lee Leahy32471722015-04-20 15:20:28 -0700129# define HSUART1_DEVID 0x228a
Lee Leahy77ff0b12015-05-05 15:07:29 -0700130# define HSUART2_DEV SIO2_DEV
131# define HSUART2_FUNC 4
Lee Leahy32471722015-04-20 15:20:28 -0700132# define HSUART2_DEVID 0x228c
Lee Leahy77ff0b12015-05-05 15:07:29 -0700133# define SPI_DEV SIO2_DEV
134# define SPI_FUNC 5
Lee Leahy32471722015-04-20 15:20:28 -0700135# define SPI_DEVID 0x228e
Lee Leahy77ff0b12015-05-05 15:07:29 -0700136
137/* Platform Controller Unit */
138#define PCU_DEV 0x1f
139# define LPC_DEV PCU_DEV
140# define LPC_FUNC 0
Lee Leahy32471722015-04-20 15:20:28 -0700141# define LPC_DEVID 0x229c
Lee Leahy77ff0b12015-05-05 15:07:29 -0700142# define SMBUS_DEV PCU_DEV
143# define SMBUS_FUNC 3
144# define SMBUS_DEVID 0x0f12
145
Lee Leahy32471722015-04-20 15:20:28 -0700146/* PCH SCC Device Modes */
147#define PCH_DISABLED 0
148#define PCH_PCI_MODE 1
149#define PCH_ACPI_MODE 2
150#endif /* _SOC_PCI_DEVS_H_ */