| Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the coreboot project. |
| 3 | * |
| 4 | * Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com> |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * (at your option) any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 15 | */ |
| 16 | |
| Edward O'Callaghan | 6d51f6b | 2014-04-23 17:01:45 +1000 | [diff] [blame] | 17 | #ifndef SUPERIO_FINTEK_F71869AD_H |
| 18 | #define SUPERIO_FINTEK_F71869AD_H |
| Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 19 | |
| 20 | /* Logical Device Numbers (LDN). */ |
| 21 | #define F71869AD_FDC 0x00 /* Floppy */ |
| 22 | #define F71869AD_SP1 0x01 /* UART1 */ |
| 23 | #define F71869AD_SP2 0x02 /* UART2 */ |
| 24 | #define F71869AD_PP 0x03 /* Parallel port */ |
| 25 | #define F71869AD_HWM 0x04 /* Hardware monitor */ |
| 26 | #define F71869AD_KBC 0x05 /* PS/2 keyboard and mouse */ |
| 27 | #define F71869AD_GPIO 0x06 /* General Purpose I/O (GPIO) */ |
| Edward O'Callaghan | c848098 | 2014-05-08 19:50:55 +1000 | [diff] [blame] | 28 | #define F71869AD_WDT 0x07 /* WDT */ |
| 29 | #define F71869AD_CIR 0x08 /* CIR */ |
| Edward O'Callaghan | 962b6c0 | 2014-01-23 22:12:25 +1100 | [diff] [blame] | 30 | #define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */ |
| 31 | |
| Edward O'Callaghan | 6d51f6b | 2014-04-23 17:01:45 +1000 | [diff] [blame] | 32 | #endif /* SUPERIO_FINTEK_F71869AD_H */ |