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Alexandru Gagniuc23211b02013-06-09 16:06:07 -05001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050015 */
16
17#include "vx900.h"
18#include "chip.h"
19
20#include <console/console.h>
21#include <device/device.h>
22#include <device/pci.h>
23#include <device/pci_ids.h>
24#include <cpu/cpu.h>
Nico Huber68dd00d2018-10-06 18:01:30 +020025#include <cf9_reset.h>
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050026#include <reset.h>
27#include <string.h>
28
29#define RAM_4GB (((u64)1) << 32)
30
Kyösti Mälkki5cf88242013-10-18 11:02:56 +030031static uint64_t uma_memory_base = 0;
32static uint64_t uma_memory_size = 0;
33
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050034/**
Martin Roth543888d2015-01-06 10:20:42 -070035 * @file vx900/northbridge.c
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050036 *
37 * STATUS: Pretty good
38 * One thing that needs to be thoroughly tested is the remap above 4G logic.
39 * Unfortunately, while we cannot initialize odd ranks, our testing
40 * possibilities are somewhat limited. A point of failure that is not covered is
41 * when the amount of RAM and PCI config space added up exceeds 8GB. The
42 * remapping mechanism will overflow, the effects of which are unknown.
43 */
44
Nico Huber68dd00d2018-10-06 18:01:30 +020045void do_board_reset(void)
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050046{
Nico Huber68dd00d2018-10-06 18:01:30 +020047 system_reset();
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050048}
49
Kyösti Mälkki5cf88242013-10-18 11:02:56 +030050uint64_t get_uma_memory_base(void)
51{
52 printk(BIOS_DEBUG, "UMA base 0x%.8llx (%lluMB)\n", uma_memory_base,
53 uma_memory_base >> 20);
54 printk(BIOS_DEBUG, "UMA size 0x%.8llx (%lluMB)\n", uma_memory_size,
55 uma_memory_size >> 20);
56 return uma_memory_base;
57}
58
Elyes HAOUAS2a5f6cb2018-05-25 08:09:53 +020059static u64 vx900_get_top_of_ram(struct device *mcu)
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050060{
61 u16 reg16;
62 /* The last valid DRAM address is computed by the MCU
63 * One issue might be if we have a hole in the rank mappings, so that
64 * virtual ranks are not mapped successively in the linear address space
65 * (Ex: rank 0 mapped 0-1G, rank 1 mapped 2G-3G)
66 * We don't do this awkward mapping in RAM init, so we don't worry about
67 * it here, but it is something to keep in mind if having RAM issues */
68 reg16 = pci_read_config16(mcu, 0x88) & 0x07ff;
69 return (u64) reg16 << 24;
70}
71
72/*
73 * This guy is meant to go away, but for now, leave it in so that we can see
74 * if the logic to remap RAM above 4G has errors.
75 */
76static void killme_debug_4g_remap_reg(u32 reg32)
77{
78 if (reg32 & (1 << 0))
Stefan Reinauer65b72ab2015-01-05 12:59:54 -080079 printk(BIOS_DEBUG, "Mem remapping enabled\n");
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050080 u64 remapstart = (reg32 >> 2) & 0x3ff;
81 u64 remapend = (reg32 >> 14) & 0x3ff;
82 remapstart <<= 26;
83 remapend <<= 26;
Elyes HAOUAS38424982016-08-21 12:01:04 +020084 printk(BIOS_DEBUG, "Remapstart %lld(MB)\n", remapstart >> 20);
85 printk(BIOS_DEBUG, "Remapend %lld(MB)\n", remapend >> 20);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050086}
87
88/**
89 * \brief Remap low memory colliding with PCI MMIO space, above 4G
90 *
91 * @param mcu The memory controller
92 * @param tolm Top of low memory.
93 *
94 * @return The new top of memory.
95 */
Elyes HAOUAS2a5f6cb2018-05-25 08:09:53 +020096static u64 vx900_remap_above_4g(struct device *mcu, u32 tolm)
Alexandru Gagniuc23211b02013-06-09 16:06:07 -050097{
98 size_t i;
99 u8 reg8, start8, end8, start, end;
100 u16 reg16;
101 u32 reg32;
102 u64 tor, newtor, chunk;
103
104 /*
105 * The remapping mechanism works like this:
106 *
107 * - Choose the top of low memory.
108 * This becomes the "remap from"
109 * - Choose a chunk above 4G where to remap.
110 * This becomes "remap to"
111 * - Choose a chunk above 4G where to end the remapping.
112 * This becomes "remap until"
113 *
114 * This remaps a "chunk" of memory where we want to.
115 * sizeof(chunk) = until - to;
116 *
117 * Therefore the memory region from "from" to " from + sizeof(chunk)"
118 * becomes accessible at "to" to "until"
119 */
120 if (tolm >= vx900_get_top_of_ram(mcu)) {
Stefan Reinauer65b72ab2015-01-05 12:59:54 -0800121 printk(BIOS_DEBUG, "Nothing to remap\n");
Lubomir Rintelb2fa1b22017-11-01 07:40:31 +0100122 return 0;
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500123 }
124
125 /* This is how the Vendor BIOS. Keep it for comparison for now */
126 killme_debug_4g_remap_reg(0x00180141);
127 /* We can remap with a granularity of 64MB, so align tolm */
128 tolm &= ~((64 * MiB) - 1);
129
130 /* The "start remapping from where ?" register */
131 reg16 = ((tolm >> 20) & 0xfff) << 4;
132 pci_mod_config16(mcu, 0x84, 0xfff0, reg16);
133
134 /* Find the chunk size */
135 tor = vx900_get_top_of_ram(mcu);
136 printk(BIOS_DEBUG, "Top of RAM %lldMB\n", tor >> 20);
137
138 if (tor < RAM_4GB) {
139 chunk = tor - tolm;
140 newtor = RAM_4GB + chunk;
141 } else {
142 chunk = (RAM_4GB - tolm);
143 newtor = tor + chunk;
144 }
145 printk(BIOS_DEBUG, "New top of RAM %lldMB\n", newtor >> 20);
146
147 reg8 = tolm >> 26;
148 /* Which rank does the PCI TOLM fall on? */
149 for (i = 0; i < VX900_MAX_MEM_RANKS; i++) {
150 end8 = pci_read_config8(mcu, 0x40 + i);
151 if (reg8 > end8)
152 continue;
153 start8 = pci_read_config8(mcu, 0x48 + i);
154 if (reg8 <= start8)
155 continue;
Patrick Georgi6f7e4b22014-05-19 09:18:11 +0200156 printk(BIOS_DEBUG, "Address %x falls on rank %zu\n", tolm, i);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500157 break;
158 }
159
160 for (; i < VX900_MAX_MEM_RANKS; i++) {
161 start = pci_read_config8(mcu, 0x48 + i);
162 end = pci_read_config8(mcu, 0x40 + i);
163
164 if (end == 0) {
Patrick Georgi6f7e4b22014-05-19 09:18:11 +0200165 printk(BIOS_DEBUG, "Huh? rank %zu empty?\n", i);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500166 continue;
167 }
168
169 if (end < (tolm >> 26)) {
Patrick Georgi6f7e4b22014-05-19 09:18:11 +0200170 printk(BIOS_DEBUG, "Huh? rank %zu don't need remap?\n",
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500171 i);
172 continue;
173 }
174
175 printk(BIOS_DEBUG, "Physical rank %u is mapped to\n"
176 " Start address: 0x%.10llx (%dMB)\n"
177 " End address: 0x%.10llx (%dMB)\n",
178 (int)i,
179 ((u64) start << 26), (start << (26 - 20)),
180 ((u64) end << 26), (end << (26 - 20)));
181
182 if (end < (RAM_4GB >> 26))
183 end = (RAM_4GB >> 26);
184
185 if (end >= (tolm >> 26))
186 end += chunk >> 26;
187
188 if (start > (tolm >> 26))
189 start += chunk >> 26;
190
191 pci_write_config8(mcu, 0x48 + i, start);
192 pci_write_config8(mcu, 0x40 + i, end);
193
194 printk(BIOS_DEBUG, "ReMapped Physical rank %u, to\n"
195 " Start address: 0x%.10llx (%dMB)\n"
196 " End address: 0x%.10llx (%dMB)\n",
197 (int)i,
198 ((u64) start << 26), (start << (26 - 20)),
199 ((u64) end << 26), (end << (26 - 20)));
200 }
201
202 /* The "remap to where?" register */
Alexandru Gagniuc560433b2013-06-10 15:47:25 -0500203 reg32 = ((MAX(tor, RAM_4GB) >> 26) & 0x3ff) << 2;
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500204 /* The "remap until where?" register */
205 reg32 |= ((newtor >> 26) & 0x3ff) << 14;
206 /* Now enable the goodies */
207 reg32 |= (1 << 0);
208 pci_write_config32(mcu, 0xf8, reg32);
209 printk(BIOS_DEBUG, "Wrote remap map %x\n", reg32);
210 killme_debug_4g_remap_reg(reg32);
211
212 printk(BIOS_DEBUG, "New top of memory is at %lldMB\n", newtor >> 20);
213 return newtor;
214}
215
Elyes HAOUAS2a5f6cb2018-05-25 08:09:53 +0200216static void vx900_set_resources(struct device *dev)
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500217{
218 u32 pci_tolm, tomk, vx900_tolm, full_tolmk, fbufk, tolmk;
219
Stefan Reinauer65b72ab2015-01-05 12:59:54 -0800220 printk(BIOS_DEBUG, "========================================"
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500221 "========================================\n");
Stefan Reinauer65b72ab2015-01-05 12:59:54 -0800222 printk(BIOS_DEBUG, "============= VX900 memory sizing & Co. "
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500223 "========================================\n");
Stefan Reinauer65b72ab2015-01-05 12:59:54 -0800224 printk(BIOS_DEBUG, "========================================"
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500225 "========================================\n");
226
227 int idx = 10;
Elyes HAOUAS2a5f6cb2018-05-25 08:09:53 +0200228 struct device *const mcu = dev_find_device(PCI_VENDOR_ID_VIA,
229 PCI_DEVICE_ID_VIA_VX900_MEMCTRL,
230 0);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500231 if (!mcu) {
232 die("Something is terribly wrong.\n"
233 " We tried locating the MCU on the PCI bus, "
234 "but couldn't find it. Halting.\n");
235 }
236
237 /* How much low adrress space do we have? */
238 pci_tolm = find_pci_tolm(dev->link_list);
239 printk(BIOS_SPEW, "Found PCI tolm at %.8x\n", pci_tolm);
240 printk(BIOS_SPEW, "Found PCI tolm at %dMB\n", pci_tolm >> 20);
241
242 /* Figure out the total amount of RAM */
243 tomk = vx900_get_top_of_ram(mcu) >> 10;
244 printk(BIOS_SPEW, "Found top of memory at %dMB\n", tomk >> 10);
245
246 /* Do the same for top of low RAM */
Lubomir Rinteld8ec9732017-12-28 01:48:09 +0100247 vx900_tolm = vx900_get_tolm();
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500248 full_tolmk = vx900_tolm << (20 - 10);
249 /* Remap above 4G if needed */
Alexandru Gagniuc560433b2013-06-10 15:47:25 -0500250 full_tolmk = MIN(full_tolmk, pci_tolm >> 10);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500251 printk(BIOS_SPEW, "Found top of low memory at %dMB\n",
252 full_tolmk >> 10);
253
254 /* What about the framebuffer for the integrated GPU? */
Lubomir Rinteld8ec9732017-12-28 01:48:09 +0100255 fbufk = vx900_get_chrome9hd_fb_size() << (20 - 10);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500256 printk(BIOS_SPEW, "Integrated graphics buffer: %dMB\n", fbufk >> 10);
257
258 /* Can't use the framebuffer as system RAM, sorry */
Alexandru Gagniuc560433b2013-06-10 15:47:25 -0500259 tolmk = MIN(full_tolmk, tomk);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500260 tolmk -= fbufk;
261 ram_resource(dev, idx++, 0, 640);
Elyes HAOUAS15279a92016-07-28 21:05:26 +0200262 printk(BIOS_SPEW, "System RAM left: %dMB\n", tolmk >> 10);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500263 /* FIXME: how can we avoid leaving this hole?
264 * Leave a hole for VGA, 0xa0000 - 0xc0000 ?? */
265 /* TODO: VGA Memory hole can be disabled in SNMIC. Upper 64k of ROM seem
266 * to be always mapped to the top of 1M, but this can be overcome with
267 * some smart positive/subtractive resource decoding */
268 ram_resource(dev, idx++, 768, (tolmk - 768));
269 uma_memory_size = fbufk << 10;
270 uma_memory_base = tolmk << 10;
271
Kyösti Mälkki5cf88242013-10-18 11:02:56 +0300272 //uma_resource(dev, idx++, uma_memory_base>>10, uma_memory_size>>10);
273
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500274 printk(BIOS_DEBUG, "UMA @ %lldMB + %lldMB\n", uma_memory_base >> 20,
275 uma_memory_size >> 20);
276 /* FIXME: How do we handle remapping above 4G? */
277 u64 tor = vx900_remap_above_4g(mcu, pci_tolm);
Lubomir Rintelb2fa1b22017-11-01 07:40:31 +0100278 if (tor)
279 ram_resource(dev, idx++, RAM_4GB >> 10, (tor - RAM_4GB) >> 10);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500280
Stefan Reinauer65b72ab2015-01-05 12:59:54 -0800281 printk(BIOS_DEBUG, "======================================================\n");
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500282 assign_resources(dev->link_list);
283}
284
Elyes HAOUAS2a5f6cb2018-05-25 08:09:53 +0200285static void vx900_read_resources(struct device *dev)
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500286{
287 /* Our fixed resources start at 0 */
288 int idx = 0;
289 /* Reserve our ROM mapped space */
290 struct resource *res;
291 res = new_resource(dev, idx++);
292 res->size = CONFIG_ROM_SIZE;
293 res->base = 0xffffffff - (res->size - 1);
294 res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
295
296 /* Now do the same for our MMCONF
297 * We always run with MMCONF enabled. We need to access the extended
298 * config space when configuring PCI-Express links */
Kyösti Mälkkie25b5ef2016-12-02 08:56:05 +0200299 mmconf_resource(dev, idx++);
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500300
301 pci_domain_read_resources(dev);
302}
303
304static struct device_operations pci_domain_ops = {
305 .read_resources = vx900_read_resources,
306 .set_resources = vx900_set_resources,
307 .enable_resources = NULL,
308 .init = NULL,
309 .scan_bus = pci_domain_scan_bus,
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500310};
311
Elyes HAOUAS2a5f6cb2018-05-25 08:09:53 +0200312static void cpu_bus_init(struct device *dev)
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500313{
314 initialize_cpus(dev->link_list);
315}
316
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500317static struct device_operations cpu_bus_ops = {
Edward O'Callaghand2040732014-10-31 08:26:21 +1100318 .read_resources = DEVICE_NOOP,
319 .set_resources = DEVICE_NOOP,
320 .enable_resources = DEVICE_NOOP,
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500321 .init = cpu_bus_init,
322 .scan_bus = 0,
323};
324
Elyes HAOUAS2a5f6cb2018-05-25 08:09:53 +0200325static void enable_dev(struct device *dev)
Alexandru Gagniuc23211b02013-06-09 16:06:07 -0500326{
327 /* Set the operations if it is a special bus type */
328 if (dev->path.type == DEVICE_PATH_DOMAIN) {
329 dev->ops = &pci_domain_ops;
330 } else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
331 dev->ops = &cpu_bus_ops;
332 }
333}
334
335struct chip_operations northbridge_via_vx900_ops = {
336 CHIP_NAME("VIA VX900 Chipset")
337 .enable_dev = enable_dev,
338};