blob: e7e329848a68da817362de7de2fe5d7188ba5982 [file] [log] [blame]
Stefan Reinauer1b342262011-01-05 02:27:53 +00001menu "Console"
Hung-Te Linad173ea2013-02-06 21:24:12 +08002
Gabe Blackfbb11cf2013-06-06 00:21:20 -07003config BOOTBLOCK_CONSOLE
4 bool "Enable early (bootblock) console output."
Alexandru Gagniucee464b12015-10-02 18:01:18 -07005 depends on C_ENVIRONMENT_BOOTBLOCK
Stefan Reinauerd2f45c62013-06-19 13:42:00 -07006 default n
Gabe Blackfbb11cf2013-06-06 00:21:20 -07007 help
8 Use console during the bootblock if supported
9
Lee Leahy049b4622016-07-31 11:53:28 -070010config POSTCAR_CONSOLE
11 bool "Enable console output during postcar."
12 depends on POSTCAR_STAGE
13 default n
14 help
15 Use console during the postcar if supported
16
Kyösti Mälkki361cd812013-08-12 23:29:57 +030017config SQUELCH_EARLY_SMP
18 bool "Squelch AP CPUs from early console."
19 default y
Lee Leahyf2ad50f2016-02-08 16:19:56 -080020 depends on SMP
Kyösti Mälkki361cd812013-08-12 23:29:57 +030021 help
22 When selected only the BSP CPU will output to early console.
23
24 Console drivers have unpredictable behaviour if multiple threads
25 attempt to share the same resources without a spinlock.
26
27 If unsure, say Y.
28
Hung-Te Linad173ea2013-02-06 21:24:12 +080029config CONSOLE_SERIAL
Uwe Hermannd12b7032009-10-16 22:39:55 +000030 bool "Serial port console output"
Stefan Reinauer509f7722012-12-07 17:31:37 -080031 default y
Nico Huber755db952018-11-11 01:42:17 +010032 depends on DRIVERS_UART
Stefan Reinauer509f7722012-12-07 17:31:37 -080033 help
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +020034 Send coreboot debug output to a serial port.
David Hendricks6a503b62012-12-31 17:28:43 -080035
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +020036 The type of serial port driver selected based on your configuration is
37 shown on the following menu line. Supporting multiple different types
38 of UARTs in one build is not supported.
Stefan Reinauer4885daa2011-04-26 23:47:04 +000039
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +020040if CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +000041
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +020042 comment "I/O mapped, 8250-compatible"
43 depends on DRIVERS_UART_8250IO
44
45 comment "memory mapped, 8250-compatible"
46 depends on DRIVERS_UART_8250MEM
47
48 comment "device-specific UART"
Hung-Te Linad173ea2013-02-06 21:24:12 +080049 depends on HAVE_UART_SPECIAL
Stefan Reinauer509f7722012-12-07 17:31:37 -080050
Kyösti Mälkki70342a72014-03-14 22:28:29 +020051config UART_FOR_CONSOLE
Kyösti Mälkkid5403772014-05-01 00:02:43 +030052 int "Index for UART port to use for console"
Kyösti Mälkki70342a72014-03-14 22:28:29 +020053 default 0
Martin Rothac76ed92015-11-19 11:40:43 -070054 help
55 Select an I/O port to use for serial console:
56 0 = 0x3f8, 1 = 0x2f8, 2 = 0x3e8, 3 = 0x2e8
Uwe Hermannd12b7032009-10-16 22:39:55 +000057
Kyösti Mälkki70342a72014-03-14 22:28:29 +020058# FIXME: Early programming in romstage is incorrect as we should
59# program different LDN to actually change the physical port.
Uwe Hermannd12b7032009-10-16 22:39:55 +000060config TTYS0_BASE
61 hex
Gabe Black77ffa0d2013-09-30 21:25:49 -070062 depends on DRIVERS_UART
Kyösti Mälkki70342a72014-03-14 22:28:29 +020063 default 0x3f8 if UART_FOR_CONSOLE = 0
64 default 0x2f8 if UART_FOR_CONSOLE = 1
65 default 0x3e8 if UART_FOR_CONSOLE = 2
66 default 0x2e8 if UART_FOR_CONSOLE = 3
Uwe Hermannd12b7032009-10-16 22:39:55 +000067 help
Kyösti Mälkki70342a72014-03-14 22:28:29 +020068 Map the COM port number to the respective I/O port.
Uwe Hermannd12b7032009-10-16 22:39:55 +000069
Martin Rothac76ed92015-11-19 11:40:43 -070070comment "Serial port base address = 0x3f8"
71depends on UART_FOR_CONSOLE = 0
72comment "Serial port base address = 0x2f8"
73depends on UART_FOR_CONSOLE = 1
74comment "Serial port base address = 0x3e8"
75depends on UART_FOR_CONSOLE = 2
76comment "Serial port base address = 0x2e8"
77depends on UART_FOR_CONSOLE = 3
78
Julien Viard de Galbert235daa42018-02-20 11:45:48 +010079config UART_OVERRIDE_BAUDRATE
80 boolean
81 help
82 Set to "y" when the platform overrides the baudrate by providing
83 a get_uart_baudrate routine.
84
85if !UART_OVERRIDE_BAUDRATE
86
Uwe Hermannd12b7032009-10-16 22:39:55 +000087choice
Uwe Hermanna081a3b2009-10-26 23:52:34 +000088 prompt "Baud rate"
Uwe Hermannd12b7032009-10-16 22:39:55 +000089 default CONSOLE_SERIAL_115200
Uwe Hermannd12b7032009-10-16 22:39:55 +000090
Lee Leahycda71b82016-02-20 05:39:10 -080091config CONSOLE_SERIAL_921600
92 bool "921600"
93 help
94 Set serial port Baud rate to 921600.
95config CONSOLE_SERIAL_460800
96 bool "460800"
97 help
98 Set serial port Baud rate to 460800.
99config CONSOLE_SERIAL_230400
100 bool "230400"
101 help
102 Set serial port Baud rate to 230400.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000103config CONSOLE_SERIAL_115200
104 bool "115200"
105 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000106 Set serial port Baud rate to 115200.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000107config CONSOLE_SERIAL_57600
108 bool "57600"
109 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000110 Set serial port Baud rate to 57600.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000111config CONSOLE_SERIAL_38400
112 bool "38400"
113 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000114 Set serial port Baud rate to 38400.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000115config CONSOLE_SERIAL_19200
116 bool "19200"
117 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000118 Set serial port Baud rate to 19200.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000119config CONSOLE_SERIAL_9600
120 bool "9600"
121 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000122 Set serial port Baud rate to 9600.
Uwe Hermannd12b7032009-10-16 22:39:55 +0000123
124endchoice
Patrick Georgi0588d192009-08-12 15:00:51 +0000125
Stefan Reinauer509f7722012-12-07 17:31:37 -0800126#FIXME(dhendrix): Change name to SERIAL_BAUD? (Stefan sayz: yes!!)
Patrick Georgi0588d192009-08-12 15:00:51 +0000127config TTYS0_BAUD
Uwe Hermannd12b7032009-10-16 22:39:55 +0000128 int
Lee Leahycda71b82016-02-20 05:39:10 -0800129 default 921600 if CONSOLE_SERIAL_921600
130 default 460800 if CONSOLE_SERIAL_460800
131 default 230400 if CONSOLE_SERIAL_230400
Uwe Hermannd12b7032009-10-16 22:39:55 +0000132 default 115200 if CONSOLE_SERIAL_115200
133 default 57600 if CONSOLE_SERIAL_57600
134 default 38400 if CONSOLE_SERIAL_38400
135 default 19200 if CONSOLE_SERIAL_19200
136 default 9600 if CONSOLE_SERIAL_9600
137 help
Uwe Hermanna081a3b2009-10-26 23:52:34 +0000138 Map the Baud rates to an integer.
Patrick Georgi0588d192009-08-12 15:00:51 +0000139
Julien Viard de Galbert235daa42018-02-20 11:45:48 +0100140endif
141
Uwe Hermann168b11b2009-10-07 16:15:40 +0000142# TODO: Allow user-friendly selection of settings other than 8n1.
Patrick Georgi0e9a9252009-10-06 20:48:07 +0000143config TTYS0_LCS
144 int
145 default 3
Kyösti Mälkkiafa7b132014-02-13 17:16:22 +0200146 depends on DRIVERS_UART_8250IO || DRIVERS_UART_8250MEM
147
148endif # CONSOLE_SERIAL
Patrick Georgi0e9a9252009-10-06 20:48:07 +0000149
Vladimir Serbinenko45988da2013-03-30 02:02:13 +0100150config SPKMODEM
151 bool "spkmodem (console on speaker) console output"
152 default n
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100153 depends on ARCH_X86
Vladimir Serbinenko45988da2013-03-30 02:02:13 +0100154 help
155 Send coreboot debug output through speaker
156
Kyösti Mälkkiab94bbf2014-02-25 12:06:14 +0200157config CONSOLE_USB
158 bool "USB dongle console output"
159 depends on USBDEBUG
Nico Huber06125eb2018-10-03 12:02:09 +0200160 default y
Uwe Hermann168b11b2009-10-07 16:15:40 +0000161 help
Kyösti Mälkkiab94bbf2014-02-25 12:06:14 +0200162 Send coreboot debug output to USB.
Uwe Hermann168b11b2009-10-07 16:15:40 +0000163
Kyösti Mälkkiab94bbf2014-02-25 12:06:14 +0200164 Configuration for USB hardware is under menu Generic Drivers.
Kyösti Mälkkid2dac0a2013-08-23 23:33:16 +0300165
Uwe Hermann168b11b2009-10-07 16:15:40 +0000166# TODO: Deps?
167# TODO: Improve description.
Stefan Reinauerabc0c852010-11-22 08:09:50 +0000168config ONBOARD_VGA_IS_PRIMARY
Uwe Hermann168b11b2009-10-07 16:15:40 +0000169 bool "Use onboard VGA as primary video device"
Myles Watson45bb25f2009-09-22 18:49:08 +0000170 default n
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100171 depends on PCI
Myles Watson45bb25f2009-09-22 18:49:08 +0000172 help
173 If not selected, the last adapter found will be used.
174
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000175config CONSOLE_NE2K
176 bool "Network console over NE2000 compatible Ethernet adapter"
177 default n
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100178 depends on PCI
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000179 help
180 Send coreboot debug output to a Ethernet console, it works
181 same way as Linux netconsole, packets are received to UDP
182 port 6666 on IP/MAC specified with options bellow.
183 Use following netcat command: nc -u -l -p 6666
184
185config CONSOLE_NE2K_DST_MAC
186 depends on CONSOLE_NE2K
187 string "Destination MAC address of remote system"
188 default "00:13:d4:76:a2:ac"
189 help
190 Type in either MAC address of logging system or MAC address
191 of the router.
192
193config CONSOLE_NE2K_DST_IP
194 depends on CONSOLE_NE2K
195 string "Destination IP of logging system"
196 default "10.0.1.27"
197 help
Daniele Forsi53847a22014-07-22 18:00:56 +0200198 This is IP address of the system running for example
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000199 netcat command to dump the packets.
200
201config CONSOLE_NE2K_SRC_IP
202 depends on CONSOLE_NE2K
Stefan Reinauerd6b4f1c2010-09-23 18:29:40 +0000203 string "IP address of coreboot system"
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000204 default "10.0.1.253"
205 help
Stefan Reinauerd6b4f1c2010-09-23 18:29:40 +0000206 This is the IP of the coreboot system
Rudolf Marek4aa93cc2010-07-16 20:02:09 +0000207
208config CONSOLE_NE2K_IO_PORT
209 depends on CONSOLE_NE2K
210 hex "NE2000 adapter fixed IO port address"
211 default 0xe00
212 help
213 This is the IO port address for the IO port
214 on the card, please select some non-conflicting region,
215 32 bytes of IO spaces will be used (and align on 32 bytes
216 boundary, qemu needs broader align)
217
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700218config CONSOLE_CBMEM
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700219 bool "Send console output to a CBMEM buffer"
Paul Menzel60ef4562014-03-08 10:46:52 +0100220 default y
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700221 help
222 Enable this to save the console output in a CBMEM buffer. This would
223 allow to see coreboot console output from Linux space.
224
Kyösti Mälkki8659e402014-12-21 08:55:47 +0200225if CONSOLE_CBMEM
226
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700227config CONSOLE_CBMEM_BUFFER_SIZE
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700228 hex "Room allocated for console output in CBMEM"
Vladimir Serbinenkoeb67a042014-09-13 20:55:58 +0200229 default 0x20000
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700230 help
231 Space allocated for console output storage in CBMEM. The default
Vladimir Serbinenkoeb67a042014-09-13 20:55:58 +0200232 value (128K or 0x20000 bytes) is large enough to accommodate
Vadim Bendeburyc34b4632011-09-28 13:51:30 -0700233 even the BIOS_SPEW level.
234
Vadim Bendebury6e20e2f2015-04-10 18:04:04 -0700235config CONSOLE_CBMEM_DUMP_TO_UART
236 depends on !CONSOLE_SERIAL
237 bool "Dump CBMEM console on resets"
238 default n
239 help
240 Enable this to have CBMEM console buffer contents dumped on the
241 serial output in case serial console is disabled and the device
242 resets itself while trying to boot the payload.
243
Kyösti Mälkki8659e402014-12-21 08:55:47 +0200244endif
245
Youness Alaouic4b4ff32017-05-11 10:36:29 -0400246config CONSOLE_SPI_FLASH
247 bool "SPI Flash console output"
248 default n
249 select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if !COMMON_CBFS_SPI_WRAPPER
250 help
251 Send coreboot debug output to the SPI Flash in the FMAP CONSOLE area
252
253 This option can cause premature wear on the SPI flash and should not
254 be used as a normal means of debugging. It is only to be enabled and
255 used when porting a new motherboard which has no other console
256 available (no UART, no POST, no cbmem access(non bootable)). Since
257 a non bootable machine will require the use of an external SPI Flash
258 programmer, the developer can grab the console log at the same time.
259
260 The flash console will not be erased on reboot, so once it is full,
261 the flashconsole driver will stop writing to it. This is to avoid
262 wear on the flash, and to avoid erasing sectors (which may freeze
263 the SPI controller on skylake).
264
265 The 'CONSOLE' area can be extracted from the FMAP with :
266 cbfstool rom.bin read -r CONSOLE -f console.log
267
268config CONSOLE_SPI_FLASH_BUFFER_SIZE
269 hex "Room allocated for console output in FMAP"
270 default 0x20000
271 depends on CONSOLE_SPI_FLASH
272 help
273 Space allocated for console output storage in FMAP. The default
274 value (128K or 0x20000 bytes) is large enough to accommodate
275 even the BIOS_SPEW level.
276
Gerd Hoffmannd7c6e442013-05-30 10:32:31 +0200277config CONSOLE_QEMU_DEBUGCON
Gerd Hoffmann038aa292013-05-29 13:06:22 +0200278 bool "QEMU debug console output"
279 depends on BOARD_EMULATION_QEMU_X86
280 default y
281 help
282 Send coreboot debug output to QEMU's isa-debugcon device:
283
284 qemu-system-x86_64 \
285 -chardev file,id=debugcon,path=/dir/file.log \
286 -device isa-debugcon,iobase=0x402,chardev=debugcon
287
Gerd Hoffmannd7c6e442013-05-30 10:32:31 +0200288config CONSOLE_QEMU_DEBUGCON_PORT
Gerd Hoffmann038aa292013-05-29 13:06:22 +0200289 hex "QEMU debug console port"
Gerd Hoffmannd7c6e442013-05-30 10:32:31 +0200290 depends on CONSOLE_QEMU_DEBUGCON
Gerd Hoffmann038aa292013-05-29 13:06:22 +0200291 default 0x402
292
Martin Roth3a543182015-09-28 15:27:24 -0600293config SPI_CONSOLE
294 bool "SPI debug console output"
295 depends on HAVE_SPI_CONSOLE_SUPPORT && !DEBUG_SPI_FLASH
296 help
297 Enable support for the debug console on the Dediprog EM100Pro.
298 This is currently working only in ramstage due to how the spi
299 drivers are written.
300
Julien Viard de Galbert4ecd42f2018-02-20 15:01:27 +0100301config CONSOLE_OVERRIDE_LOGLEVEL
302 boolean
303 help
304 Set to "y" when the platform overrides the loglevel by providing
305 a get_console_loglevel routine.
306
307if !CONSOLE_OVERRIDE_LOGLEVEL
308
Uwe Hermann7fe41912009-10-11 13:35:24 +0000309choice
Myles Watson03646182009-10-16 19:29:45 +0000310 prompt "Default console log level"
Julius Wernere64a5852018-10-15 17:19:58 -0700311 default DEFAULT_CONSOLE_LOGLEVEL_8 if CHROMEOS
Nico Huber715a5022018-05-04 12:04:00 +0200312 default DEFAULT_CONSOLE_LOGLEVEL_7
Uwe Hermann7fe41912009-10-11 13:35:24 +0000313
314config DEFAULT_CONSOLE_LOGLEVEL_8
Myles Watson03646182009-10-16 19:29:45 +0000315 bool "8: SPEW"
Myles Watson03646182009-10-16 19:29:45 +0000316 help
317 Way too many details.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000318config DEFAULT_CONSOLE_LOGLEVEL_7
Myles Watson03646182009-10-16 19:29:45 +0000319 bool "7: DEBUG"
Myles Watson03646182009-10-16 19:29:45 +0000320 help
321 Debug-level messages.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000322config DEFAULT_CONSOLE_LOGLEVEL_6
Myles Watson03646182009-10-16 19:29:45 +0000323 bool "6: INFO"
Myles Watson03646182009-10-16 19:29:45 +0000324 help
325 Informational messages.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000326config DEFAULT_CONSOLE_LOGLEVEL_5
Myles Watson03646182009-10-16 19:29:45 +0000327 bool "5: NOTICE"
Myles Watson03646182009-10-16 19:29:45 +0000328 help
329 Normal but significant conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000330config DEFAULT_CONSOLE_LOGLEVEL_4
Myles Watson03646182009-10-16 19:29:45 +0000331 bool "4: WARNING"
Myles Watson03646182009-10-16 19:29:45 +0000332 help
333 Warning conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000334config DEFAULT_CONSOLE_LOGLEVEL_3
Myles Watson03646182009-10-16 19:29:45 +0000335 bool "3: ERR"
Myles Watson03646182009-10-16 19:29:45 +0000336 help
337 Error conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000338config DEFAULT_CONSOLE_LOGLEVEL_2
Myles Watson03646182009-10-16 19:29:45 +0000339 bool "2: CRIT"
Myles Watson03646182009-10-16 19:29:45 +0000340 help
341 Critical conditions.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000342config DEFAULT_CONSOLE_LOGLEVEL_1
Myles Watson03646182009-10-16 19:29:45 +0000343 bool "1: ALERT"
Myles Watson03646182009-10-16 19:29:45 +0000344 help
345 Action must be taken immediately.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000346config DEFAULT_CONSOLE_LOGLEVEL_0
Myles Watson03646182009-10-16 19:29:45 +0000347 bool "0: EMERG"
348 help
349 System is unusable.
Uwe Hermann7fe41912009-10-11 13:35:24 +0000350
351endchoice
352
Patrick Georgi0588d192009-08-12 15:00:51 +0000353config DEFAULT_CONSOLE_LOGLEVEL
Uwe Hermann7fe41912009-10-11 13:35:24 +0000354 int
355 default 0 if DEFAULT_CONSOLE_LOGLEVEL_0
356 default 1 if DEFAULT_CONSOLE_LOGLEVEL_1
357 default 2 if DEFAULT_CONSOLE_LOGLEVEL_2
358 default 3 if DEFAULT_CONSOLE_LOGLEVEL_3
359 default 4 if DEFAULT_CONSOLE_LOGLEVEL_4
360 default 5 if DEFAULT_CONSOLE_LOGLEVEL_5
361 default 6 if DEFAULT_CONSOLE_LOGLEVEL_6
362 default 7 if DEFAULT_CONSOLE_LOGLEVEL_7
363 default 8 if DEFAULT_CONSOLE_LOGLEVEL_8
364 help
365 Map the log level config names to an integer.
Patrick Georgi0588d192009-08-12 15:00:51 +0000366
Julien Viard de Galbert4ecd42f2018-02-20 15:01:27 +0100367endif
368
Stefan Reinauerc719f1a2010-03-30 09:57:28 +0000369config NO_POST
370 bool "Don't show any POST codes"
371 default n
372
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700373config CMOS_POST
374 bool "Store post codes in CMOS for debugging"
Stefan Reinauerc2d5a162012-12-06 14:25:27 -0800375 depends on !NO_POST && PC80_SYSTEM
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700376 default n
377 help
378 If enabled, coreboot will store post codes in CMOS and switch between
379 two offsets on each boot so the last post code in the previous boot
380 can be retrieved. This uses 3 bytes of CMOS.
381
382config CMOS_POST_OFFSET
383 hex "Offset into CMOS to store POST codes"
384 depends on CMOS_POST
Martin Roth3b878122016-09-30 14:43:01 -0600385 default 0x0
Duncan Laurieb6e97b12012-09-09 19:09:56 -0700386 help
387 If CMOS_POST is enabled then an offset into CMOS must be provided.
388 If CONFIG_HAVE_OPTION_TABLE is enabled then it will use the value
389 defined in the mainboard option table.
390
Duncan Lauried5686fe2013-06-10 10:21:41 -0700391config CMOS_POST_EXTRA
392 bool "Store extra logging info into CMOS"
393 depends on CMOS_POST
394 default n
395 help
396 This will enable extra logging of work that happens between post
397 codes into CMOS for debug. This uses an additional 8 bytes of CMOS.
398
Daniele Forsiad488d22014-07-30 12:23:35 +0200399config CONSOLE_POST
Idwer Vollering5809a732014-03-11 15:36:21 +0000400 bool "Show POST codes on the debug console"
401 depends on !NO_POST
402 default n
403 help
404 If enabled, coreboot will additionally print POST codes (which are
405 usually displayed using a so-called "POST card" ISA/PCI/PCI-E
406 device) on the debug console.
407
408config POST_DEVICE
409 bool "Send POST codes to an external device"
410 depends on !NO_POST
411 default y
412
413choice
414 prompt "Device to send POST codes to"
415 depends on POST_DEVICE
416 default POST_DEVICE_NONE
417
418config POST_DEVICE_NONE
419 bool "None"
420config POST_DEVICE_LPC
421 bool "LPC"
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100422 depends on PCI
Idwer Vollering5809a732014-03-11 15:36:21 +0000423config POST_DEVICE_PCI_PCIE
424 bool "PCI/PCIe"
Vladimir Serbinenkod51a0892016-03-04 09:20:20 +0100425 depends on PCI
Idwer Vollering5809a732014-03-11 15:36:21 +0000426endchoice
427
428config POST_IO
David Hendricks6b908d02012-11-05 12:34:09 -0800429 bool "Send POST codes to an IO port"
Idwer Vollering5809a732014-03-11 15:36:21 +0000430 depends on PC80_SYSTEM && !NO_POST
David Hendricks6b908d02012-11-05 12:34:09 -0800431 default y
432 help
433 If enabled, POST codes will be written to an IO port.
Stefan Reinauerc719f1a2010-03-30 09:57:28 +0000434
Idwer Vollering5809a732014-03-11 15:36:21 +0000435config POST_IO_PORT
436 depends on POST_IO
David Hendricks6b908d02012-11-05 12:34:09 -0800437 hex "IO port for POST codes"
438 default 0x80
439 help
440 POST codes on x86 are typically written to the LPC bus on port
Daniele Forsi53847a22014-07-22 18:00:56 +0200441 0x80. However, it may be desirable to change the port number
David Hendricks6b908d02012-11-05 12:34:09 -0800442 depending on the presence of coprocessors/microcontrollers or if the
443 platform does not support IO in the conventional x86 manner.
444
Martin Roth14554372015-11-12 14:02:42 -0700445config NO_EARLY_BOOTBLOCK_POSTCODES
446 def_bool n
447 help
448 Some chipsets require that the routing for the port 80h POST
449 code be configured before any POST codes are sent out.
450 This can be done in the boot block, but there are a couple of
451 POST codes that go out before the chipset's bootblock initialization
452 can happen. This option suppresses those POST codes.
453
Nico Huberc83239e2016-10-05 17:46:49 +0200454config HWBASE_DEBUG_CB
455 bool
456 default y if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
457 default n
458
459config HWBASE_DEBUG_NULL
460 def_bool y
461 depends on !HWBASE_DEBUG_CB
462
David Hendricks6b908d02012-11-05 12:34:09 -0800463endmenu