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Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -05004## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
Stefan Reinauer16f515a2010-01-20 18:44:30 +00005## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00006##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Patrick Georgi0588d192009-08-12 15:00:51 +000016
Uwe Hermannad8c95f2012-04-12 22:00:03 +020017mainmenu "coreboot configuration"
Patrick Georgi0588d192009-08-12 15:00:51 +000018
Uwe Hermannc04be932009-10-05 13:55:28 +000019menu "General setup"
20
Lee Leahybb70c402017-04-03 07:38:20 -070021config COREBOOT_BUILD
22 bool
23 default y
24
Uwe Hermannc04be932009-10-05 13:55:28 +000025config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000026 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000027 help
28 Append an extra string to the end of the coreboot version.
29
Uwe Hermann168b11b2009-10-07 16:15:40 +000030 This can be useful if, for instance, you want to append the
31 respective board's hostname or some other identifying string to
32 the coreboot version number, so that you can easily distinguish
33 boot logs of different boards from each other.
34
Patrick Georgi4b8a2412010-02-09 19:35:16 +000035config CBFS_PREFIX
36 string "CBFS prefix to use"
37 default "fallback"
38 help
39 Select the prefix to all files put into the image. It's "fallback"
40 by default, "normal" is a common alternative.
41
Patrick Georgi23d89cc2010-03-16 01:17:19 +000042choice
Uwe Hermannad8c95f2012-04-12 22:00:03 +020043 prompt "Compiler to use"
Patrick Georgi23d89cc2010-03-16 01:17:19 +000044 default COMPILER_GCC
45 help
46 This option allows you to select the compiler used for building
47 coreboot.
Martin Rotha5a628e82016-01-19 12:01:09 -070048 You must build the coreboot crosscompiler for the board that you
49 have selected.
50
51 To build all the GCC crosscompilers (takes a LONG time), run:
52 make crossgcc
53
54 For help on individual architectures, run the command:
55 make help_toolchain
Patrick Georgi23d89cc2010-03-16 01:17:19 +000056
57config COMPILER_GCC
58 bool "GCC"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020059 help
60 Use the GNU Compiler Collection (GCC) to build coreboot.
61
62 For details see http://gcc.gnu.org.
63
Patrick Georgi23d89cc2010-03-16 01:17:19 +000064config COMPILER_LLVM_CLANG
Martin Rotha5a628e82016-01-19 12:01:09 -070065 bool "LLVM/clang (TESTING ONLY - Not currently working)"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020066 help
Martin Rotha5a628e82016-01-19 12:01:09 -070067 Use LLVM/clang to build coreboot. To use this, you must build the
68 coreboot version of the clang compiler. Run the command
69 make clang
70 Note that this option is not currently working correctly and should
71 really only be selected if you're trying to work on getting clang
72 operational.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020073
74 For details see http://clang.llvm.org.
75
Patrick Georgi23d89cc2010-03-16 01:17:19 +000076endchoice
77
Patrick Georgi9b0de712013-12-29 18:45:23 +010078config ANY_TOOLCHAIN
79 bool "Allow building with any toolchain"
80 default n
Patrick Georgi9b0de712013-12-29 18:45:23 +010081 help
82 Many toolchains break when building coreboot since it uses quite
83 unusual linker features. Unless developers explicitely request it,
84 we'll have to assume that they use their distro compiler by mistake.
85 Make sure that using patched compilers is a conscious decision.
86
Patrick Georgi516a2a72010-03-25 21:45:25 +000087config CCACHE
Uwe Hermannad8c95f2012-04-12 22:00:03 +020088 bool "Use ccache to speed up (re)compilation"
Patrick Georgi516a2a72010-03-25 21:45:25 +000089 default n
90 help
91 Enables the use of ccache for faster builds.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020092
93 Requires the ccache utility in your system $PATH.
94
95 For details see https://ccache.samba.org.
Patrick Georgi516a2a72010-03-25 21:45:25 +000096
Sol Boucher69b88bf2015-02-26 11:47:19 -080097config FMD_GENPARSER
98 bool "Generate flashmap descriptor parser using flex and bison"
99 default n
Sol Boucher69b88bf2015-02-26 11:47:19 -0800100 help
101 Enable this option if you are working on the flashmap descriptor
102 parser and made changes to fmd_scanner.l or fmd_parser.y.
103
104 Otherwise, say N to use the provided pregenerated scanner/parser.
105
Martin Rothf411b702017-04-09 19:12:42 -0600106config UTIL_GENPARSER
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100107 bool "Generate SCONFIG & BINCFG parser using flex and bison"
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000108 default n
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000109 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200110 Enable this option if you are working on the sconfig device tree
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100111 parser or bincfg and made changes to the .l or .y files.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200112
Sol Boucher69b88bf2015-02-26 11:47:19 -0800113 Otherwise, say N to use the provided pregenerated scanner/parser.
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000114
Joe Korty6d772522010-05-19 18:41:15 +0000115config USE_OPTION_TABLE
116 bool "Use CMOS for configuration values"
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000117 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +0000118 help
119 Enable this option if coreboot shall read options from the "CMOS"
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200120 NVRAM instead of using hard-coded values.
Joe Korty6d772522010-05-19 18:41:15 +0000121
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600122config STATIC_OPTION_TABLE
123 bool "Load default configuration values into CMOS on each boot"
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600124 depends on USE_OPTION_TABLE
125 help
126 Enable this option to reset "CMOS" NVRAM values to default on
127 every boot. Use this if you want the NVRAM configuration to
128 never be modified from its default values.
129
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000130config COMPRESS_RAMSTAGE
131 bool "Compress ramstage with LZMA"
Martin Roth75e5cb72016-12-15 15:05:37 -0700132 # Default value set at the end of the file
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000133 help
134 Compress ramstage to save memory in the flash image. Note
135 that decompression might slow down booting if the boot flash
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200136 is connected through a slow link (i.e. SPI).
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000137
Julius Werner09f29212015-09-29 13:51:35 -0700138config COMPRESS_PRERAM_STAGES
139 bool "Compress romstage and verstage with LZ4"
Martin Rothf2e04612016-03-09 15:50:23 -0700140 depends on !ARCH_X86
Martin Roth75e5cb72016-12-15 15:05:37 -0700141 # Default value set at the end of the file
Julius Werner09f29212015-09-29 13:51:35 -0700142 help
143 Compress romstage and (if it exists) verstage with LZ4 to save flash
144 space and speed up boot, since the time for reading the image from SPI
145 (and in the vboot case verifying it) is usually much greater than the
146 time spent decompressing. Doesn't work for XIP stages (assume all
147 ARCH_X86 for now) for obvious reasons.
148
Julius Werner99f46832018-05-16 14:14:04 -0700149config COMPRESS_BOOTBLOCK
150 bool
151 help
152 This option can be used to compress the bootblock with LZ4 and attach
153 a small self-decompression stub to its front. This can drastically
154 reduce boot time on platforms where the bootblock is loaded over a
155 very slow connection and bootblock size trumps all other factors for
Jonathan Neuschäfer2930a722018-09-29 17:42:52 +0200156 speed. Since using this option usually requires changes to the
Julius Werner99f46832018-05-16 14:14:04 -0700157 SoC memlayout and possibly extra support code, it should not be
158 user-selectable. (There's no real point in offering this to the user
159 anyway... if it works and saves boot time, you would always want it.)
160
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200161config INCLUDE_CONFIG_FILE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200162 bool "Include the coreboot .config file into the ROM image"
Martin Roth75e5cb72016-12-15 15:05:37 -0700163 # Default value set at the end of the file
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200164 help
165 Include the .config file that was used to compile coreboot
166 in the (CBFS) ROM image. This is useful if you want to know which
167 options were used to build a specific coreboot.rom image.
168
Daniele Forsi53847a22014-07-22 18:00:56 +0200169 Saying Y here will increase the image size by 2-3KB.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200170
171 You can use the following command to easily list the options:
172
173 grep -a CONFIG_ coreboot.rom
174
175 Alternatively, you can also use cbfstool to print the image
176 contents (including the raw 'config' item we're looking for).
177
178 Example:
179
180 $ cbfstool coreboot.rom print
181 coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
182 offset 0x0
183 Alignment: 64 bytes
Steve Goodrichf0269122012-05-18 11:18:47 -0600184
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200185 Name Offset Type Size
186 cmos_layout.bin 0x0 cmos layout 1159
187 fallback/romstage 0x4c0 stage 339756
Daniele Forsi53847a22014-07-22 18:00:56 +0200188 fallback/ramstage 0x53440 stage 186664
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200189 fallback/payload 0x80dc0 payload 51526
190 config 0x8d740 raw 3324
191 (empty) 0x8e480 null 3610440
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200192
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700193config COLLECT_TIMESTAMPS
194 bool "Create a table of timestamps collected during boot"
Paul Menzel4e4a7632015-10-11 11:57:44 +0200195 default y if ARCH_X86
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700196 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200197 Make coreboot create a table of timer-ID/timer-value pairs to
198 allow measuring time spent at different phases of the boot process.
199
Martin Rothb22bbe22018-03-07 15:32:16 -0700200config TIMESTAMPS_ON_CONSOLE
201 bool "Print the timestamp values on the console"
202 default n
203 depends on COLLECT_TIMESTAMPS
204 help
205 Print the timestamps to the debug console if enabled at level spew.
206
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200207config USE_BLOBS
208 bool "Allow use of binary-only repository"
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200209 help
210 This draws in the blobs repository, which contains binary files that
211 might be required for some chipsets or boards.
212 This flag ensures that a "Free" option remains available for users.
213
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800214config COVERAGE
215 bool "Code coverage support"
216 depends on COMPILER_GCC
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800217 help
218 Add code coverage support for coreboot. This will store code
219 coverage information in CBMEM for extraction from user space.
220 If unsure, say N.
221
Ryan Salsamendiab37e9a2017-06-11 21:07:31 -0700222config UBSAN
223 bool "Undefined behavior sanitizer support"
224 default n
225 help
226 Instrument the code with checks for undefined behavior. If unsure,
227 say N because it adds a small performance penalty and may abort
228 on code that happens to work in spite of the UB.
229
Kyösti Mälkki7904e722018-06-03 14:55:10 +0300230config NO_RELOCATABLE_RAMSTAGE
231 bool
232 default n if ARCH_X86
233 default y
234
Stefan Reinauer58470e32014-10-17 13:08:36 +0200235config RELOCATABLE_RAMSTAGE
Kyösti Mälkki730df3c2016-06-18 07:39:31 +0300236 bool
Kyösti Mälkki730df3c2016-06-18 07:39:31 +0300237 default !NO_RELOCATABLE_RAMSTAGE
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200238 select RELOCATABLE_MODULES
Stefan Reinauer58470e32014-10-17 13:08:36 +0200239 help
240 The reloctable ramstage support allows for the ramstage to be built
241 as a relocatable module. The stage loader can identify a place
242 out of the OS way so that copying memory is unnecessary during an S3
243 wake. When selecting this option the romstage is responsible for
244 determing a stack location to use for loading the ramstage.
245
246config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
247 depends on RELOCATABLE_RAMSTAGE
Arthur Heymans410f2562017-01-25 15:27:52 +0100248 bool
Stefan Reinauer58470e32014-10-17 13:08:36 +0200249 help
250 The relocated ramstage is saved in an area specified by the
251 by the board and/or chipset.
252
Stefan Reinauer58470e32014-10-17 13:08:36 +0200253config UPDATE_IMAGE
254 bool "Update existing coreboot.rom image"
Stefan Reinauer58470e32014-10-17 13:08:36 +0200255 help
256 If this option is enabled, no new coreboot.rom file
257 is created. Instead it is expected that there already
258 is a suitable file for further processing.
259 The bootblock will not be modified.
260
Martin Roth5942e062016-01-20 14:59:21 -0700261 If unsure, select 'N'
262
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400263config BOOTSPLASH_IMAGE
264 bool "Add a bootsplash image"
265 help
266 Select this option if you have a bootsplash image that you would
267 like to add to your ROM.
268
269 This will only add the image to the ROM. To actually run it check
270 options under 'Display' section.
271
272config BOOTSPLASH_FILE
273 string "Bootsplash path and filename"
274 depends on BOOTSPLASH_IMAGE
Martin Roth75e5cb72016-12-15 15:05:37 -0700275 # Default value set at the end of the file
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400276 help
277 The path and filename of the file to use as graphical bootsplash
278 screen. The file format has to be jpg.
279
Uwe Hermannc04be932009-10-05 13:55:28 +0000280endmenu
281
Martin Roth026e4dc2015-06-19 23:17:15 -0600282menu "Mainboard"
283
Stefan Reinauera48ca842015-04-04 01:58:28 +0200284source "src/mainboard/Kconfig"
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000285
Marshall Dawsone9375132016-09-04 08:38:33 -0600286config DEVICETREE
287 string
288 default "devicetree.cb"
289 help
290 This symbol allows mainboards to select a different file under their
291 mainboard directory for the devicetree.cb file. This allows the board
292 variants that need different devicetrees to be in the same directory.
293
294 Examples: "devicetree.variant.cb"
295 "variant/devicetree.cb"
296
Furquan Shaikhf2419982018-06-21 18:50:48 -0700297config OVERRIDE_DEVICETREE
298 string
299 default ""
300 help
301 This symbol allows variants to provide an override devicetree file to
302 override the registers and/or add new devices on top of the ones
303 provided by baseboard devicetree using CONFIG_DEVICETREE.
304
305 Examples: "devicetree.variant-override.cb"
306 "variant/devicetree-override.cb"
307
Martin Roth026e4dc2015-06-19 23:17:15 -0600308config CBFS_SIZE
309 hex "Size of CBFS filesystem in ROM"
Martin Roth75e5cb72016-12-15 15:05:37 -0700310 # Default value set at the end of the file
Martin Roth026e4dc2015-06-19 23:17:15 -0600311 help
312 This is the part of the ROM actually managed by CBFS, located at the
313 end of the ROM (passed through cbfstool -o) on x86 and at at the start
314 of the ROM (passed through cbfstool -s) everywhere else. It defaults
315 to span the whole ROM on all but Intel systems that use an Intel Firmware
316 Descriptor. It can be overridden to make coreboot live alongside other
317 components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE
318 binaries.
319
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200320config FMDFILE
321 string "fmap description file in fmd format"
Patrick Georgi5d7ab392015-12-12 00:23:15 +0100322 default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200323 default ""
324 help
325 The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
326 but in some cases more complex setups are required.
327 When an fmd is specified, it overrides the default format.
328
Martin Rothda1ca202015-12-26 16:51:16 -0700329endmenu
330
Martin Rothb09a5692016-01-24 19:38:33 -0700331# load site-local kconfig to allow user specific defaults and overrides
332source "site-local/Kconfig"
333
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200334config SYSTEM_TYPE_LAPTOP
Martin Roth595e7772015-04-26 18:53:26 -0600335 default n
336 bool
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200337
Werner Zehc0fb3612016-01-14 15:08:36 +0100338config CBFS_AUTOGEN_ATTRIBUTES
339 default n
340 bool
341 help
342 If this option is selected, every file in cbfs which has a constraint
343 regarding position or alignment will get an additional file attribute
344 which describes this constraint.
345
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000346menu "Chipset"
347
Duncan Lauried2119762015-06-08 18:11:56 -0700348comment "SoC"
Chris Chingaa8e5d32017-10-20 10:43:39 -0600349source "src/soc/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000350comment "CPU"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200351source "src/cpu/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000352comment "Northbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200353source "src/northbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000354comment "Southbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200355source "src/southbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000356comment "Super I/O"
Omar Pakker57603e22016-07-29 23:31:45 +0200357source "src/superio/*/*/Kconfig"
Sven Schnelle7592e8b2011-01-27 11:43:03 +0000358comment "Embedded Controllers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200359source "src/ec/acpi/Kconfig"
360source "src/ec/*/*/Kconfig"
Stefan Reinauer86ddd732016-03-11 20:22:28 -0800361# FIXME move to vendorcode
Marc Jones78687972015-04-22 23:16:31 -0600362source "src/drivers/intel/fsp1_0/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000363
Martin Roth59aa2b12015-06-20 16:17:12 -0600364source "src/southbridge/intel/common/firmware/Kconfig"
Martin Rothe1523ec2015-06-19 22:30:43 -0600365source "src/vendorcode/*/Kconfig"
Martin Roth59aa2b12015-06-20 16:17:12 -0600366
Martin Rothe1523ec2015-06-19 22:30:43 -0600367source "src/arch/*/Kconfig"
368
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000369endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000370
Stefan Reinauera48ca842015-04-04 01:58:28 +0200371source "src/device/Kconfig"
Stefan Reinauer95a63962012-11-13 17:00:01 -0800372
Rudolf Marekd9c25492010-05-16 15:31:53 +0000373menu "Generic Drivers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200374source "src/drivers/*/Kconfig"
Stefan Reinauer86ddd732016-03-11 20:22:28 -0800375source "src/drivers/*/*/Kconfig"
Lee Leahy48dbc662017-05-08 16:56:03 -0700376source "src/commonlib/storage/Kconfig"
Rudolf Marekd9c25492010-05-16 15:31:53 +0000377endmenu
378
Philipp Deppenwiese1899fbe2017-10-16 17:09:33 +0200379menu "Security"
380
381source "src/security/Kconfig"
382
383endmenu
384
Martin Roth09210a12016-05-17 11:28:23 -0600385source "src/acpi/Kconfig"
386
Aaron Durbin4a36c4e2016-08-11 11:02:26 -0500387# This option is for the current boards/chipsets where SPI flash
388# is not the boot device. Currently nearly all boards/chipsets assume
389# SPI flash is the boot device.
390config BOOT_DEVICE_NOT_SPI_FLASH
391 bool
392 default n
393
394config BOOT_DEVICE_SPI_FLASH
395 bool
396 default y if !BOOT_DEVICE_NOT_SPI_FLASH
397 default n
398
Aaron Durbin16c173f2016-08-11 14:04:10 -0500399config BOOT_DEVICE_MEMORY_MAPPED
400 bool
401 default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH
402 default n
403 help
404 Inform system if SPI is memory-mapped or not.
405
Aaron Durbine8e118d2016-08-12 15:00:10 -0500406config BOOT_DEVICE_SUPPORTS_WRITES
407 bool
408 default n
409 help
410 Indicate that the platform has writable boot device
411 support.
412
Patrick Georgi0770f252015-04-22 13:28:21 +0200413config RTC
414 bool
415 default n
416
Patrick Georgi0588d192009-08-12 15:00:51 +0000417config HEAP_SIZE
418 hex
Myles Watson04000f42009-10-16 19:12:49 +0000419 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000420
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700421config STACK_SIZE
422 hex
Julius Werner66a476a2015-10-12 16:45:21 -0700423 default 0x1000 if ARCH_X86
424 default 0x0
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700425
Patrick Georgi0588d192009-08-12 15:00:51 +0000426config MAX_CPUS
427 int
428 default 1
429
Stefan Reinauera48ca842015-04-04 01:58:28 +0200430source "src/console/Kconfig"
Patrick Georgi0588d192009-08-12 15:00:51 +0000431
432config HAVE_ACPI_RESUME
433 bool
434 default n
435
Kyösti Mälkki9d6f3652016-06-28 07:38:46 +0300436config ACPI_HUGE_LOWMEM_BACKUP
437 bool
Kyösti Mälkki43e9c932016-11-10 11:50:21 +0200438 default n
Kyösti Mälkki9d6f3652016-06-28 07:38:46 +0300439 help
440 On S3 resume path, backup low memory from RAMBASE..RAMTOP in CBMEM.
441
Aaron Durbin87c9fae2016-01-22 15:26:04 -0600442config RESUME_PATH_SAME_AS_BOOT
443 bool
444 default y if ARCH_X86
445 depends on HAVE_ACPI_RESUME
446 help
447 This option indicates that when a system resumes it takes the
448 same path as a regular boot. e.g. an x86 system runs from the
449 reset vector at 0xfffffff0 on both resume and warm/cold boot.
450
Timothy Pearson44d53422015-05-18 16:04:10 -0500451config HAVE_ROMSTAGE_CONSOLE_SPINLOCK
452 bool
453 default n
454
Timothy Pearson7b22d842015-08-28 19:52:05 -0500455config HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK
456 bool
457 default n
458 help
459 This should be enabled on certain plaforms, such as the AMD
460 SR565x, that cannot handle concurrent CBFS accesses from
461 multiple APs during early startup.
462
Timothy Pearsonc764c742015-08-28 20:48:17 -0500463config HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK
464 bool
465 default n
466
Aaron Durbina4217912013-04-29 22:31:51 -0500467config HAVE_MONOTONIC_TIMER
468 def_bool n
469 help
470 The board/chipset provides a monotonic timer.
471
Aaron Durbine5e36302014-09-25 10:05:15 -0500472config GENERIC_UDELAY
473 def_bool n
474 depends on HAVE_MONOTONIC_TIMER
475 help
476 The board/chipset uses a generic udelay function utilizing the
477 monotonic timer.
478
Aaron Durbin340ca912013-04-30 09:58:12 -0500479config TIMER_QUEUE
480 def_bool n
481 depends on HAVE_MONOTONIC_TIMER
482 help
Kyösti Mälkkiecd84242013-09-13 07:57:49 +0300483 Provide a timer queue for performing time-based callbacks.
Aaron Durbin340ca912013-04-30 09:58:12 -0500484
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500485config COOP_MULTITASKING
486 def_bool n
Aaron Durbin38c326d2013-05-06 12:22:23 -0500487 depends on TIMER_QUEUE && ARCH_X86
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500488 help
489 Cooperative multitasking allows callbacks to be multiplexed on the
490 main thread of ramstage. With this enabled it allows for multiple
491 execution paths to take place when they have udelay() calls within
492 their code.
493
494config NUM_THREADS
495 int
496 default 4
497 depends on COOP_MULTITASKING
498 help
499 How many execution threads to cooperatively multitask with.
500
Patrick Georgi0588d192009-08-12 15:00:51 +0000501config HAVE_OPTION_TABLE
502 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000503 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000504 help
505 This variable specifies whether a given board has a cmos.layout
506 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000507 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000508
Patrick Georgi0588d192009-08-12 15:00:51 +0000509config PIRQ_ROUTE
510 bool
511 default n
512
513config HAVE_SMI_HANDLER
514 bool
515 default n
516
517config PCI_IO_CFG_EXT
518 bool
519 default n
520
521config IOAPIC
522 bool
523 default n
524
Myles Watson45bb25f2009-09-22 18:49:08 +0000525config USE_WATCHDOG_ON_BOOT
526 bool
527 default n
528
Myles Watson45bb25f2009-09-22 18:49:08 +0000529config GFXUMA
530 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000531 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000532 help
533 Enable Unified Memory Architecture for graphics.
534
Myles Watsonb8e20272009-10-15 13:35:47 +0000535config HAVE_ACPI_TABLES
536 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000537 help
538 This variable specifies whether a given board has ACPI table support.
539 It is usually set in mainboard/*/Kconfig.
Myles Watsonb8e20272009-10-15 13:35:47 +0000540
541config HAVE_MP_TABLE
542 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000543 help
544 This variable specifies whether a given board has MP table support.
545 It is usually set in mainboard/*/Kconfig.
546 Whether or not the MP table is actually generated by coreboot
547 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000548
549config HAVE_PIRQ_TABLE
550 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000551 help
552 This variable specifies whether a given board has PIRQ table support.
553 It is usually set in mainboard/*/Kconfig.
554 Whether or not the PIRQ table is actually generated by coreboot
555 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000556
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -0500557config MAX_PIRQ_LINKS
558 int
559 default 4
560 help
561 This variable specifies the number of PIRQ interrupt links which are
562 routable. On most chipsets, this is 4, INTA through INTD. Some
563 chipsets offer more than four links, commonly up to INTH. They may
564 also have a separate link for ATA or IOAPIC interrupts. When the PIRQ
565 table specifies links greater than 4, pirq_route_irqs will not
566 function properly, unless this variable is correctly set.
567
Vladimir Serbinenkoc21e0732014-10-16 12:48:19 +0200568config COMMON_FADT
569 bool
570 default n
571
Aaron Durbin9420a522015-11-17 16:31:00 -0600572config ACPI_NHLT
573 bool
574 default n
575 help
576 Build support for NHLT (non HD Audio) ACPI table generation.
577
Marshall Dawson991467d2018-09-04 12:32:56 -0600578config ACPI_BERT
579 bool
580 depends on HAVE_ACPI_TABLES
581 help
582 Build an ACPI Boot Error Record Table.
583
Myles Watsond73c1b52009-10-26 15:14:07 +0000584#These Options are here to avoid "undefined" warnings.
585#The actual selection and help texts are in the following menu.
586
Uwe Hermann168b11b2009-10-07 16:15:40 +0000587menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000588
Myles Watsonb8e20272009-10-15 13:35:47 +0000589config GENERATE_MP_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800590 prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
591 bool
592 default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000593 help
594 Generate an MP table (conforming to the Intel MultiProcessor
595 specification 1.4) for this board.
596
597 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000598
Myles Watsonb8e20272009-10-15 13:35:47 +0000599config GENERATE_PIRQ_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800600 prompt "Generate a PIRQ table" if HAVE_PIRQ_TABLE
601 bool
602 default HAVE_PIRQ_TABLE
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000603 help
604 Generate a PIRQ table for this board.
605
606 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000607
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200608config GENERATE_SMBIOS_TABLES
609 depends on ARCH_X86
610 bool "Generate SMBIOS tables"
611 default y
612 help
613 Generate SMBIOS tables for this board.
614
615 If unsure, say Y.
616
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200617config SMBIOS_PROVIDED_BY_MOBO
618 bool
619 default n
620
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200621config MAINBOARD_SERIAL_NUMBER
622 string "SMBIOS Serial Number"
623 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200624 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200625 default "123456789"
Martin Roth595e7772015-04-26 18:53:26 -0600626 help
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200627 The Serial Number to store in SMBIOS structures.
628
629config MAINBOARD_VERSION
630 string "SMBIOS Version Number"
631 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200632 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200633 default "1.0"
634 help
635 The Version Number to store in SMBIOS structures.
636
637config MAINBOARD_SMBIOS_MANUFACTURER
638 string "SMBIOS Manufacturer"
639 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200640 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200641 default MAINBOARD_VENDOR
642 help
643 Override the default Manufacturer stored in SMBIOS structures.
644
645config MAINBOARD_SMBIOS_PRODUCT_NAME
646 string "SMBIOS Product name"
647 depends on GENERATE_SMBIOS_TABLES
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200648 depends on !SMBIOS_PROVIDED_BY_MOBO
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200649 default MAINBOARD_PART_NUMBER
650 help
651 Override the default Product name stored in SMBIOS structures.
652
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100653config SMBIOS_ENCLOSURE_TYPE
654 hex
655 depends on GENERATE_SMBIOS_TABLES
656 default 0x09 if SYSTEM_TYPE_LAPTOP
657 default 0x03
658 help
659 System Enclosure or Chassis Types as defined in SMBIOS specification.
660 The default value is SMBIOS_ENCLOSURE_DESKTOP (0x03) or
661 SMBIOS_ENCLOSURE_LAPTOP (0x09) if SYSTEM_TYPE_LAPTOP is set.
662
Myles Watson45bb25f2009-09-22 18:49:08 +0000663endmenu
664
Martin Roth21c06502016-02-04 19:52:27 -0700665source "payloads/Kconfig"
Peter Stugea758ca22009-09-17 16:21:31 +0000666
Uwe Hermann168b11b2009-10-07 16:15:40 +0000667menu "Debugging"
668
Nico Huberd67edca2018-11-13 19:28:07 +0100669comment "CPU Debug Settings"
670source "src/cpu/*/Kconfig.debug"
671
672comment "General Debug Settings"
673
Uwe Hermann168b11b2009-10-07 16:15:40 +0000674# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000675config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000676 bool "GDB debugging support"
Rudolf Marek65888022012-03-25 20:51:16 +0200677 default n
Denis 'GNUtoo' Carikli3747ba12015-12-10 22:04:56 +0100678 depends on CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +0000679 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000680 If enabled, you will be able to set breakpoints for gdb debugging.
Stefan Reinauer8677a232010-12-11 20:33:41 +0000681 See src/arch/x86/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000682
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200683config GDB_WAIT
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100684 bool "Wait for a GDB connection in the ramstage"
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200685 default n
686 depends on GDB_STUB
687 help
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100688 If enabled, coreboot will wait for a GDB connection in the ramstage.
689
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200690
Julius Wernerd82e0cf2015-02-17 17:27:23 -0800691config FATAL_ASSERTS
692 bool "Halt when hitting a BUG() or assertion error"
693 default n
694 help
695 If enabled, coreboot will call hlt() on a BUG() or failed ASSERT().
696
Nico Huber371a6672018-11-13 22:06:40 +0100697config HAVE_DEBUG_GPIO
698 bool
699
700config DEBUG_GPIO
701 bool "Output verbose GPIO debug messages"
702 depends on HAVE_DEBUG_GPIO
703
Stefan Reinauerfe422182012-05-02 16:33:18 -0700704config DEBUG_CBFS
705 bool "Output verbose CBFS debug messages"
706 default n
Stefan Reinauerfe422182012-05-02 16:33:18 -0700707 help
708 This option enables additional CBFS related debug messages.
709
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000710config HAVE_DEBUG_RAM_SETUP
711 def_bool n
712
Uwe Hermann01ce6012010-03-05 10:03:50 +0000713config DEBUG_RAM_SETUP
714 bool "Output verbose RAM init debug messages"
715 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000716 depends on HAVE_DEBUG_RAM_SETUP
Uwe Hermann01ce6012010-03-05 10:03:50 +0000717 help
718 This option enables additional RAM init related debug messages.
719 It is recommended to enable this when debugging issues on your
720 board which might be RAM init related.
721
722 Note: This option will increase the size of the coreboot image.
723
724 If unsure, say N.
725
Myles Watson80e914f2010-06-01 19:25:31 +0000726config DEBUG_PIRQ
727 bool "Check PIRQ table consistency"
728 default n
729 depends on GENERATE_PIRQ_TABLE
730 help
731 If unsure, say N.
732
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000733config HAVE_DEBUG_SMBUS
734 def_bool n
735
Uwe Hermann01ce6012010-03-05 10:03:50 +0000736config DEBUG_SMBUS
737 bool "Output verbose SMBus debug messages"
738 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000739 depends on HAVE_DEBUG_SMBUS
Uwe Hermann01ce6012010-03-05 10:03:50 +0000740 help
741 This option enables additional SMBus (and SPD) debug messages.
742
743 Note: This option will increase the size of the coreboot image.
744
745 If unsure, say N.
746
747config DEBUG_SMI
748 bool "Output verbose SMI debug messages"
749 default n
750 depends on HAVE_SMI_HANDLER
Nico Huber9e53db42018-06-05 22:34:08 +0200751 select SPI_FLASH_SMM if SPI_CONSOLE || CONSOLE_SPI_FLASH
Uwe Hermann01ce6012010-03-05 10:03:50 +0000752 help
753 This option enables additional SMI related debug messages.
754
755 Note: This option will increase the size of the coreboot image.
756
757 If unsure, say N.
758
Uwe Hermanna953f372010-11-10 00:14:32 +0000759# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
760# printk(BIOS_DEBUG, ...) calls.
761config DEBUG_MALLOC
Stefan Reinauer95a63962012-11-13 17:00:01 -0800762 prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
763 bool
Uwe Hermanna953f372010-11-10 00:14:32 +0000764 default n
Uwe Hermanna953f372010-11-10 00:14:32 +0000765 help
766 This option enables additional malloc related debug messages.
767
768 Note: This option will increase the size of the coreboot image.
769
770 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300771
772# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
773# printk(BIOS_DEBUG, ...) calls.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300774config DEBUG_ACPI
Stefan Reinauer95a63962012-11-13 17:00:01 -0800775 prompt "Output verbose ACPI debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
776 bool
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300777 default n
778 help
779 This option enables additional ACPI related debug messages.
780
781 Note: This option will slightly increase the size of the coreboot image.
782
783 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300784
Uwe Hermanna953f372010-11-10 00:14:32 +0000785# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
786# printk(BIOS_DEBUG, ...) calls.
Myles Watson6c9bc012010-09-07 22:30:15 +0000787config REALMODE_DEBUG
Stefan Reinauer95a63962012-11-13 17:00:01 -0800788 prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
789 bool
Myles Watson6c9bc012010-09-07 22:30:15 +0000790 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000791 depends on PCI_OPTION_ROM_RUN_REALMODE
Myles Watson6c9bc012010-09-07 22:30:15 +0000792 help
793 This option enables additional x86emu related debug messages.
794
795 Note: This option will increase the time to emulate a ROM.
796
797 If unsure, say N.
798
Uwe Hermann01ce6012010-03-05 10:03:50 +0000799config X86EMU_DEBUG
800 bool "Output verbose x86emu debug messages"
801 default n
802 depends on PCI_OPTION_ROM_RUN_YABEL
803 help
804 This option enables additional x86emu related debug messages.
805
806 Note: This option will increase the size of the coreboot image.
807
808 If unsure, say N.
809
810config X86EMU_DEBUG_JMP
811 bool "Trace JMP/RETF"
812 default n
813 depends on X86EMU_DEBUG
814 help
815 Print information about JMP and RETF opcodes from x86emu.
816
817 Note: This option will increase the size of the coreboot image.
818
819 If unsure, say N.
820
821config X86EMU_DEBUG_TRACE
822 bool "Trace all opcodes"
823 default n
824 depends on X86EMU_DEBUG
825 help
826 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000827
Uwe Hermann01ce6012010-03-05 10:03:50 +0000828 WARNING: This will produce a LOT of output and take a long time.
829
830 Note: This option will increase the size of the coreboot image.
831
832 If unsure, say N.
833
834config X86EMU_DEBUG_PNP
835 bool "Log Plug&Play accesses"
836 default n
837 depends on X86EMU_DEBUG
838 help
839 Print Plug And Play accesses made by option ROMs.
840
841 Note: This option will increase the size of the coreboot image.
842
843 If unsure, say N.
844
845config X86EMU_DEBUG_DISK
846 bool "Log Disk I/O"
847 default n
848 depends on X86EMU_DEBUG
849 help
850 Print Disk I/O related messages.
851
852 Note: This option will increase the size of the coreboot image.
853
854 If unsure, say N.
855
856config X86EMU_DEBUG_PMM
857 bool "Log PMM"
858 default n
859 depends on X86EMU_DEBUG
860 help
861 Print messages related to POST Memory Manager (PMM).
862
863 Note: This option will increase the size of the coreboot image.
864
865 If unsure, say N.
866
867
868config X86EMU_DEBUG_VBE
869 bool "Debug VESA BIOS Extensions"
870 default n
871 depends on X86EMU_DEBUG
872 help
873 Print messages related to VESA BIOS Extension (VBE) functions.
874
875 Note: This option will increase the size of the coreboot image.
876
877 If unsure, say N.
878
879config X86EMU_DEBUG_INT10
880 bool "Redirect INT10 output to console"
881 default n
882 depends on X86EMU_DEBUG
883 help
884 Let INT10 (i.e. character output) calls print messages to debug output.
885
886 Note: This option will increase the size of the coreboot image.
887
888 If unsure, say N.
889
890config X86EMU_DEBUG_INTERRUPTS
891 bool "Log intXX calls"
892 default n
893 depends on X86EMU_DEBUG
894 help
895 Print messages related to interrupt handling.
896
897 Note: This option will increase the size of the coreboot image.
898
899 If unsure, say N.
900
901config X86EMU_DEBUG_CHECK_VMEM_ACCESS
902 bool "Log special memory accesses"
903 default n
904 depends on X86EMU_DEBUG
905 help
906 Print messages related to accesses to certain areas of the virtual
907 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
908
909 Note: This option will increase the size of the coreboot image.
910
911 If unsure, say N.
912
913config X86EMU_DEBUG_MEM
914 bool "Log all memory accesses"
915 default n
916 depends on X86EMU_DEBUG
917 help
918 Print memory accesses made by option ROM.
919 Note: This also includes accesses to fetch instructions.
920
921 Note: This option will increase the size of the coreboot image.
922
923 If unsure, say N.
924
925config X86EMU_DEBUG_IO
926 bool "Log IO accesses"
927 default n
928 depends on X86EMU_DEBUG
929 help
930 Print I/O accesses made by option ROM.
931
932 Note: This option will increase the size of the coreboot image.
933
934 If unsure, say N.
935
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +0200936config X86EMU_DEBUG_TIMINGS
937 bool "Output timing information"
938 default n
939 depends on X86EMU_DEBUG && UDELAY_LAPIC && HAVE_MONOTONIC_TIMER
940 help
941 Print timing information needed by i915tool.
942
943 If unsure, say N.
944
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -0700945config DEBUG_SPI_FLASH
946 bool "Output verbose SPI flash debug messages"
947 default n
948 depends on SPI_FLASH
949 help
950 This option enables additional SPI flash related debug messages.
951
Kyösti Mälkki3be80cc2013-06-06 10:46:37 +0300952config DEBUG_USBDEBUG
953 bool "Output verbose USB 2.0 EHCI debug dongle messages"
954 default n
955 depends on USBDEBUG
956 help
957 This option enables additional USB 2.0 debug dongle related messages.
958
959 Select this to debug the connection of usbdebug dongle. Note that
960 you need some other working console to receive the messages.
961
Stefan Reinauer8e073822012-04-04 00:07:22 +0200962if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
963# Only visible with the right southbridge and loglevel.
964config DEBUG_INTEL_ME
965 bool "Verbose logging for Intel Management Engine"
966 default n
967 help
968 Enable verbose logging for Intel Management Engine driver that
969 is present on Intel 6-series chipsets.
970endif
971
Rudolf Marek7f0e9302011-09-02 23:23:41 +0200972config TRACE
973 bool "Trace function calls"
974 default n
975 help
976 If enabled, every function will print information to console once
977 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
978 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
Ben Gardner8420ad42015-11-18 10:46:53 -0600979 of calling function. Please note some printk related functions
Rudolf Marek7f0e9302011-09-02 23:23:41 +0200980 are omitted from trace to have good looking console dumps.
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800981
982config DEBUG_COVERAGE
983 bool "Debug code coverage"
984 default n
985 depends on COVERAGE
986 help
987 If enabled, the code coverage hooks in coreboot will output some
988 information about the coverage data that is dumped.
989
Jonathan Neuschäferfc04f9b2016-06-29 21:59:32 +0200990config DEBUG_BOOT_STATE
991 bool "Debug boot state machine"
992 default n
993 help
994 Control debugging of the boot state machine. When selected displays
995 the state boundaries in ramstage.
996
Nico Hubere84e62542016-10-05 17:43:56 +0200997config DEBUG_ADA_CODE
998 bool "Compile debug code in Ada sources"
999 default n
1000 help
1001 Add the compiler switch `-gnata` to compile code guarded by
1002 `pragma Debug`.
1003
Simon Glass46255f72018-07-12 15:26:07 -06001004config HAVE_EM100_SUPPORT
1005 bool "Platform can support the Dediprog EM100 SPI emulator"
1006 help
1007 This is enabled by platforms which can support using the EM100.
1008
1009config EM100
1010 bool "Configure image for EM100 usage"
1011 depends on HAVE_EM100_SUPPORT
1012 help
1013 The Dediprog EM100 SPI emulator allows fast loading of new SPI images
1014 over USB. However it only supports a maximum SPI clock of 20MHz and
1015 single data output. Enable this option to use a 20MHz SPI clock and
1016 disable "Dual Output Fast Read" Support.
1017
1018 On AMD platforms this changes the SPI speed at run-time if the
1019 mainboard code supports this. On supported Intel platforms this works
1020 by changing the settings in the descriptor.bin file.
1021
Uwe Hermann168b11b2009-10-07 16:15:40 +00001022endmenu
1023
Martin Roth8e4aafb2016-12-15 15:25:15 -07001024
1025###############################################################################
1026# Set variables with no prompt - these can be set anywhere, and putting at
1027# the end of this file gives the most flexibility.
Nico Huber3db76532017-05-18 18:07:34 +02001028
1029source "src/lib/Kconfig"
1030
Myles Watsond73c1b52009-10-26 15:14:07 +00001031config ENABLE_APIC_EXT_ID
1032 bool
1033 default n
Myles Watson2e672732009-11-12 16:38:03 +00001034
1035config WARNINGS_ARE_ERRORS
1036 bool
Edward O'Callaghan63f6dc72014-11-18 03:17:54 +11001037 default y
Patrick Georgi436f99b2009-11-27 16:55:13 +00001038
Peter Stuge51eafde2010-10-13 06:23:02 +00001039# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
1040# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
1041# mutually exclusive. One of these options must be selected in the
1042# mainboard Kconfig if the chipset supports enabling and disabling of
1043# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
1044# in mainboard/Kconfig to know if the button should be enabled or not.
1045
1046config POWER_BUTTON_DEFAULT_ENABLE
1047 def_bool n
1048 help
1049 Select when the board has a power button which can optionally be
1050 disabled by the user.
1051
1052config POWER_BUTTON_DEFAULT_DISABLE
1053 def_bool n
1054 help
1055 Select when the board has a power button which can optionally be
1056 enabled by the user, e.g. when the board ships with a jumper over
1057 the power switch contacts.
1058
1059config POWER_BUTTON_FORCE_ENABLE
1060 def_bool n
1061 help
1062 Select when the board requires that the power button is always
1063 enabled.
1064
1065config POWER_BUTTON_FORCE_DISABLE
1066 def_bool n
1067 help
1068 Select when the board requires that the power button is always
1069 disabled, e.g. when it has been hardwired to ground.
1070
1071config POWER_BUTTON_IS_OPTIONAL
1072 bool
1073 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
1074 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
1075 help
1076 Internal option that controls ENABLE_POWER_BUTTON visibility.
Duncan Laurie72748002013-10-31 08:26:23 -07001077
1078config REG_SCRIPT
1079 bool
Duncan Laurie72748002013-10-31 08:26:23 -07001080 default n
1081 help
1082 Internal option that controls whether we compile in register scripts.
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001083
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001084config MAX_REBOOT_CNT
1085 int
1086 default 3
Timothy Pearson17ada2e2015-03-18 01:31:34 -05001087 help
1088 Internal option that sets the maximum number of bootblock executions allowed
1089 with the normal image enabled before assuming the normal image is defective
Vadim Bendebury9c9c3362014-07-23 09:40:02 -07001090 and switching to the fallback image.
Martin Roth59ff3402016-02-09 09:06:46 -07001091
Lee Leahyfc3741f2016-05-26 17:12:17 -07001092config CREATE_BOARD_CHECKLIST
1093 bool
1094 default n
1095 help
1096 When selected, creates a webpage showing the implementation status for
1097 the board. Routines highlighted in green are complete, yellow are
1098 optional and red are required and must be implemented. A table is
1099 produced for each stage of the boot process except the bootblock. The
1100 red items may be used as an implementation checklist for the board.
1101
1102config MAKE_CHECKLIST_PUBLIC
1103 bool
1104 default n
1105 help
1106 When selected, build/$(CONFIG_MAINBOARD_PART_NUMBER)_checklist.html
1107 is copied into the Documentation/$(CONFIG_MAINBOARD_VENDOR)/Board
1108 directory.
1109
1110config CHECKLIST_DATA_FILE_LOCATION
1111 string
1112 help
1113 Location of the <stage>_complete.dat and <stage>_optional.dat files
1114 that are consumed during checklist processing. <stage>_complete.dat
1115 contains the symbols that are expected to be in the resulting image.
1116 <stage>_optional.dat is a subset of <stage>_complete.dat and contains
1117 a list of weak symbols which the resulting image may consume. Other
1118 symbols contained only in <stage>_complete.dat will be flagged as
1119 required and not implemented if a weak implementation is found in the
1120 resulting image.
Nico Hubere0ed9022016-10-07 12:58:17 +02001121
Martin Roth8e4aafb2016-12-15 15:25:15 -07001122config UNCOMPRESSED_RAMSTAGE
1123 bool
1124
1125config NO_XIP_EARLY_STAGES
1126 bool
1127 default n if ARCH_X86
1128 default y
1129 help
1130 Identify if early stages are eXecute-In-Place(XIP).
1131
Martin Roth8e4aafb2016-12-15 15:25:15 -07001132config EARLY_CBMEM_LIST
1133 bool
1134 default n
1135 help
1136 Enable display of CBMEM during romstage and postcar.
1137
1138config RELOCATABLE_MODULES
1139 bool
1140 help
1141 If RELOCATABLE_MODULES is selected then support is enabled for
1142 building relocatable modules in the RAM stage. Those modules can be
1143 loaded anywhere and all the relocations are handled automatically.
1144
1145config NO_STAGE_CACHE
1146 bool
Kyösti Mälkkia8c0cb32018-06-25 15:38:45 +03001147 default y if !HAVE_ACPI_RESUME
Martin Roth8e4aafb2016-12-15 15:25:15 -07001148 help
1149 Do not save any component in stage cache for resume path. On resume,
1150 all components would be read back from CBFS again.
1151
1152config GENERIC_GPIO_LIB
1153 bool
1154 help
1155 If enabled, compile the generic GPIO library. A "generic" GPIO
1156 implies configurability usually found on SoCs, particularly the
1157 ability to control internal pull resistors.
1158
1159config GENERIC_SPD_BIN
1160 bool
1161 help
1162 If enabled, add support for adding spd.hex files in cbfs as spd.bin
1163 and locating it runtime to load SPD. Additionally provide provision to
1164 fetch SPD over SMBus.
1165
1166config DIMM_MAX
1167 int
1168 default 4
1169 depends on GENERIC_SPD_BIN
1170 help
1171 Total number of memory DIMM slots available on motherboard.
1172 It is multiplication of number of channel to number of DIMMs per
1173 channel
1174
1175config DIMM_SPD_SIZE
1176 int
1177 default 256
Martin Roth8e4aafb2016-12-15 15:25:15 -07001178 help
1179 Total SPD size that will be used for DIMM.
1180 Ex: DDR3 256, DDR4 512.
1181
Kane Chen66f1f382017-10-16 19:40:18 +08001182config SPD_READ_BY_WORD
1183 bool
1184
Martin Roth8e4aafb2016-12-15 15:25:15 -07001185config BOOTBLOCK_CUSTOM
1186 # To be selected by arch, SoC or mainboard if it does not want use the normal
1187 # src/lib/bootblock.c#main() C entry point.
1188 bool
1189
1190config C_ENVIRONMENT_BOOTBLOCK
1191 # To be selected by arch or platform if a C environment is available during the
1192 # bootblock. Normally this signifies availability of RW memory (e.g. SRAM).
1193 bool
1194
Martin Roth75e5cb72016-12-15 15:05:37 -07001195###############################################################################
1196# Set default values for symbols created before mainboards. This allows the
1197# option to be displayed in the general menu, but the default to be loaded in
1198# the mainboard if desired.
1199config COMPRESS_RAMSTAGE
1200 default y if !UNCOMPRESSED_RAMSTAGE
1201
1202config COMPRESS_PRERAM_STAGES
1203 depends on !ARCH_X86
1204 default y
1205
1206config INCLUDE_CONFIG_FILE
1207 default y
1208
Martin Roth75e5cb72016-12-15 15:05:37 -07001209config BOOTSPLASH_FILE
1210 depends on BOOTSPLASH_IMAGE
1211 default "bootsplash.jpg"
1212
1213config CBFS_SIZE
1214 default ROM_SIZE