blob: 8b5fa5b93c5e05e5bac425bfd8e9c58c92f739f7 [file] [log] [blame]
Uwe Hermann0120e1a2007-09-16 18:11:03 +00001/*
2 * This file is part of the LinuxBIOS project.
3 *
4 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include "superiotool.h"
22
Uwe Hermannde24a0e2007-09-19 00:03:14 +000023void dump_fintek(uint16_t port, uint16_t did)
Uwe Hermann0120e1a2007-09-16 18:11:03 +000024{
25 switch (did) {
26 case 0x0604:
27 printf("Fintek F71805\n");
28 break;
29 case 0x4103:
30 printf("Fintek F71872\n");
31 break;
32 default:
33 printf("Unknown Fintek Super I/O: did=0x%04x\n", did);
34 return;
35 }
36
37 printf("Flash write is %s.\n",
38 regval(port, 0x28) & 0x80 ? "enabled" : "disabled");
39 printf("Flash control is 0x%04x.\n", regval(port, 0x28));
40 printf("27=%02x\n", regval(port, 0x27));
41 printf("29=%02x\n", regval(port, 0x29));
42 printf("2a=%02x\n", regval(port, 0x2a));
43 printf("2b=%02x\n", regval(port, 0x2b));
44
45 /* Select UART 1. */
46 regwrite(port, 0x07, 0x01);
47 printf("UART1 is %s\n",
48 regval(port, 0x30) & 1 ? "enabled" : "disabled");
49 printf("UART1 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
50 regval(port, 0x61), regval(port, 0x70) & 0x0f,
51 regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
52
53 /* Select UART 2. */
54 regwrite(port, 0x07, 0x02);
55 printf("UART2 is %s\n",
56 regval(port, 0x30) & 1 ? "enabled" : "disabled");
57 printf("UART2 base=%02x%02x, irq=%02x, mode=%s\n", regval(port, 0x60),
58 regval(port, 0x61), regval(port, 0x70) & 0x0f,
59 regval(port, 0xf0) & 0x10 ? "RS485" : "RS232");
60
61 /* Select parallel port. */
62 regwrite(port, 0x07, 0x03);
63 printf("PARPORT is %s\n",
64 regval(port, 0x30) & 1 ? "enabled" : "disabled");
65 printf("PARPORT base=%02x%02x, irq=%02x\n", regval(port, 0x60),
66 regval(port, 0x61), regval(port, 0x70) & 0x0f);
67
68 /* Select HW monitor. */
69 regwrite(port, 0x07, 0x04);
70 printf("HW monitor is %s\n",
71 regval(port, 0x30) & 1 ? "enabled" : "disabled");
72 printf("HW monitor base=%02x%02x, irq=%02x\n", regval(port, 0x60),
73 regval(port, 0x61), regval(port, 0x70) & 0x0f);
74
75 /* Select GPIO. */
76 regwrite(port, 0x07, 0x05);
77 printf("GPIO is %s\n", regval(port, 0x30) & 1 ? "enabled" : "disabled");
78 printf
79 ("GPIO 70=%02x, e0=%02x, e1=%02x, e2=%02x, e3=%02x, e4=%02x, e5=%02x\n",
80 regval(port, 0x70), regval(port, 0xe0), regval(port, 0xe1),
81 regval(port, 0xe2), regval(port, 0xe3), regval(port, 0xe4),
82 regval(port, 0xe5));
83 printf
84 ("GPIO e6=%02x, e7=%02x, e8=%02x, e9=%02x, f0=%02x, f1=%02x, f3=%02x, f4=%02x\n",
85 regval(port, 0xe6), regval(port, 0xe7), regval(port, 0xe8),
86 regval(port, 0xe9), regval(port, 0xf0), regval(port, 0xf1),
87 regval(port, 0xf3), regval(port, 0xf4));
88 printf("GPIO f5=%02x, f6=%02x, f7=%02x, f8=%02x\n", regval(port, 0xf5),
89 regval(port, 0xf6), regval(port, 0xf7), regval(port, 0xf8));
90}
91
Uwe Hermann3acf31e2007-09-19 01:55:35 +000092static void enter_conf_mode_fintek(uint16_t port)
Uwe Hermann0120e1a2007-09-16 18:11:03 +000093{
Uwe Hermann0120e1a2007-09-16 18:11:03 +000094 /* Enable configuration sequence (Fintek uses this for example)
95 * Older ITE chips have the same enable sequence.
96 */
97 outb(0x87, port);
98 outb(0x87, port);
Uwe Hermann25a6c0f2007-09-19 00:48:42 +000099}
100
Uwe Hermann3acf31e2007-09-19 01:55:35 +0000101static void exit_conf_mode_fintek(uint16_t port)
Uwe Hermann25a6c0f2007-09-19 00:48:42 +0000102{
103 /* Exit MB PnP mode (for Fintek, doesn't hurt ITE). */
104 outb(0xaa, port);
105}
106
107void probe_idregs_fintek(uint16_t port)
108{
109 uint16_t vid, did, success = 0;
110
111 enter_conf_mode_fintek(port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000112
113 outb(0x20, port);
114 if (inb(port) != 0x20) {
Uwe Hermann3acf31e2007-09-19 01:55:35 +0000115 no_superio_found(port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000116 return;
117 }
118 did = inb(port + 1);
119 did |= (regval(port, 0x21) << 8);
120
121 vid = regval(port, 0x23);
122 vid |= (regval(port, 0x24) << 8);
123
124 printf("Super I/O found at 0x%02x: vid=0x%04x/did=0x%04x\n",
125 port, vid, did);
126
127 if (vid == 0xff || vid == 0xffff)
128 return;
129
130 /* printf("%s\n", familyid[id]); */
131 switch (did) {
132 case 0x0887: /* Pseudoreversed for ITE8708 */
133 case 0x1087: /* Pseudoreversed for ITE8710 */
134 success = 1;
135 dump_ite(port, ((did & 0xff) << 8) | ((did & 0xff00) >> 8));
136 regwrite(port, 0x02, 0x02); /* Exit MB PnP mode. */
137 break;
138 default:
139 break;
140 }
141
142 switch (vid) {
143 case 0x3419:
144 success = 1;
145 dump_fintek(port, did);
146 break;
147 default:
148 break;
149 }
150
151 if (!success)
152 printf("No dump for vid 0x%04x, did 0x%04x\n", vid, did);
153
Uwe Hermann25a6c0f2007-09-19 00:48:42 +0000154 exit_conf_mode_fintek(port);
Uwe Hermann0120e1a2007-09-16 18:11:03 +0000155}
156