blob: 9538d1cab2e08ee5257a173d452beb00e7813234 [file] [log] [blame]
David Hendricks7d48ac52018-03-09 14:30:38 -08001##
2## This file is part of the coreboot project.
3##
4## Copyright 2017-present Facebook, Inc.
5##
6## This program is free software; you can redistribute it and/or modify
7## it under the terms of the GNU General Public License as published by
8## the Free Software Foundation; version 2 of the License.
9##
10## This program is distributed in the hope that it will be useful,
11## but WITHOUT ANY WARRANTY; without even the implied warranty of
12## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13## GNU General Public License for more details.
14##
15
16config CAVIUM_BDK
17 def_bool n
18 select HAVE_DEBUG_RAM_SETUP
19 help
20 Build Cavium's BDK in romstage.
21
22if CAVIUM_BDK
23
24menu "BDK"
25
26config CAVIUM_BDK_VERBOSE_INIT
27 bool "Enable verbose init"
28 depends on CAVIUM_BDK
29 help
30 Build Cavium's BDK with verbose init code.
31
32config CAVIUM_BDK_VERBOSE_DRAM
33 bool "Enable verbose dram init"
34 default y if DEBUG_RAM_SETUP
35 depends on CAVIUM_BDK
36 help
37 Build Cavium's BDK with verbose dram init code.
38
39config CAVIUM_BDK_VERBOSE_DRAM_TEST
40 bool "Enable verbose raminit tests"
41 depends on CAVIUM_BDK
42 help
43 Build Cavium's BDK with verbose DRAM testing code.
44
45config CAVIUM_BDK_VERBOSE_QLM
46 bool "Enable verbose qlm init"
47 depends on CAVIUM_BDK
48 help
49 Build Cavium's BDK with verbose QLM code.
50
51config CAVIUM_BDK_VERBOSE_PCIE_CONFIG
52 bool "Enable verbose pcie config"
53 depends on CAVIUM_BDK
54 help
55 Build Cavium's BDK with verbose PCIe config code.
56
57config CAVIUM_BDK_VERBOSE_PCIE
58 bool "Enable verbose pcie init"
59 depends on CAVIUM_BDK
60 help
61 Build Cavium's BDK with verbose PCIe code.
62
63config CAVIUM_BDK_VERBOSE_PHY
64 bool "Enable verbose phy init"
65 depends on CAVIUM_BDK
66 help
67 Build Cavium's BDK with verbose PHY code.
Patrick Rudolphde8e6892018-07-12 11:47:37 +020068
69config CAVIUM_BDK_DDR_TUNE_HW_OFFSETS
70 bool "Hardware assisted DLL read offset tuning"
71 default n
72 depends on CAVIUM_BDK
73
74 help
75 Automatically tune the data byte DLL read offsets.
76 Always done by default, but allow use of HW-assist.
77 NOTE: HW-assist will also tune the ECC byte.
78
79config CAVIUM_BDK_DDR_TUNE_WRITE_OFFSETS
80 bool "Automatically tune the data byte DLL write offsets"
81 default n
82 depends on CAVIUM_BDK
83
84config CAVIUM_BDK_DDR_TUNE_ECC_ENABLE
85 bool "Automatically tune the ECC byte DLL read offsets"
86 default n
87 depends on CAVIUM_BDK
88
David Hendricks7d48ac52018-03-09 14:30:38 -080089endmenu
90
91endif