blob: ad89f85011a620908992e33a7f812e199d0463b9 [file] [log] [blame]
Taniya Das09c3bfe2019-08-07 11:34:57 +05301/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2019 Qualcomm Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
Taniya Das09c3bfe2019-08-07 11:34:57 +053016#include <assert.h>
17#include <delay.h>
Julius Werner55009af2019-12-02 22:03:27 -080018#include <device/mmio.h>
Taniya Das09c3bfe2019-08-07 11:34:57 +053019#include <timer.h>
20#include <timestamp.h>
21#include <types.h>
22
23#include <gpio.h>
24
25void gpio_configure(gpio_t gpio, uint32_t func, uint32_t pull,
26 uint32_t drive_str, uint32_t enable)
27{
28 uint32_t reg_val;
29 struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
30
31 /* gpio pull only PULLNONE, PULLUP, KEEPER, PULLDOWN status */
32 assert(pull <= GPIO_PULL_UP);
33
34 reg_val = ((enable & GPIO_CFG_OE_BMSK) << GPIO_CFG_OE_SHFT) |
35 ((drive_str & GPIO_CFG_DRV_BMSK) << GPIO_CFG_DRV_SHFT) |
36 ((func & GPIO_CFG_FUNC_BMSK) << GPIO_CFG_FUNC_SHFT) |
37 ((pull & GPIO_CFG_PULL_BMSK) << GPIO_CFG_PULL_SHFT);
38
39 write32(&regs->cfg, reg_val);
40}
41
42void gpio_set(gpio_t gpio, int value)
43{
44 struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
45
46 write32(&regs->in_out, (!!value) << GPIO_IO_OUT_SHFT);
47}
48
49int gpio_get(gpio_t gpio)
50{
51 struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
52
53 return ((read32(&regs->in_out) >> GPIO_IO_IN_SHFT) &
54 GPIO_IO_IN_BMSK);
55}
56
57void gpio_input_pulldown(gpio_t gpio)
58{
59 gpio_configure(gpio, GPIO_FUNC_GPIO,
60 GPIO_PULL_DOWN, GPIO_2MA, GPIO_OUTPUT_DISABLE);
61}
62
63void gpio_input_pullup(gpio_t gpio)
64{
65 gpio_configure(gpio, GPIO_FUNC_GPIO,
66 GPIO_PULL_UP, GPIO_2MA, GPIO_OUTPUT_DISABLE);
67}
68
69void gpio_input(gpio_t gpio)
70{
71 gpio_configure(gpio, GPIO_FUNC_GPIO,
72 GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT_DISABLE);
73}
74
75void gpio_output(gpio_t gpio, int value)
76{
77 gpio_set(gpio, value);
78 gpio_configure(gpio, GPIO_FUNC_GPIO,
79 GPIO_NO_PULL, GPIO_2MA, GPIO_OUTPUT_ENABLE);
80}
81
82void gpio_input_irq(gpio_t gpio, enum gpio_irq_type type, uint32_t pull)
83{
84 struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
85
86 gpio_configure(gpio, GPIO_FUNC_GPIO,
87 pull, GPIO_2MA, GPIO_OUTPUT_DISABLE);
88
Julius Werner55009af2019-12-02 22:03:27 -080089 clrsetbits32(&regs->intr_cfg, GPIO_INTR_DECT_CTL_MASK <<
Taniya Das09c3bfe2019-08-07 11:34:57 +053090 GPIO_INTR_DECT_CTL_SHIFT, type << GPIO_INTR_DECT_CTL_SHIFT);
Julius Werner55009af2019-12-02 22:03:27 -080091 clrsetbits32(&regs->intr_cfg, GPIO_INTR_RAW_STATUS_ENABLE
Taniya Das09c3bfe2019-08-07 11:34:57 +053092 << GPIO_INTR_RAW_STATUS_EN_SHIFT, GPIO_INTR_RAW_STATUS_ENABLE
93 << GPIO_INTR_RAW_STATUS_EN_SHIFT);
94}
95
96int gpio_irq_status(gpio_t gpio)
97{
98 struct tlmm_gpio *regs = (void *)(uintptr_t)gpio.addr;
99
100 if (!(read32(&regs->intr_status) & GPIO_INTR_STATUS_MASK))
101 return 0;
102
103 write32(&regs->intr_status, GPIO_INTR_STATUS_DISABLE);
104 return 1;
105}