blob: 90773afb9728acc5eddc2dab6909810455fec615 [file] [log] [blame]
Vadim Bendebury41a5d0d2014-05-13 17:47:57 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2007-2009 coresystems GmbH
5 * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved.
6 * Copyright 2013 Google Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
Vadim Bendebury41a5d0d2014-05-13 17:47:57 -070016 */
17
18#include <console/console.h>
19#include <device/device.h>
Julius Wernerec5e5e02014-08-20 15:29:56 -070020#include <symbols.h>
Vadim Bendebury7c256402015-01-13 13:07:48 -080021#include <soc/ipq_uart.h>
David Hendricks24452742014-07-02 13:50:57 -070022
23#define RESERVED_SIZE_KB (0x01500000 / KiB)
24
Elyes HAOUASd6cd2552018-05-25 10:01:13 +020025static void soc_read_resources(struct device *dev)
Vadim Bendebury41a5d0d2014-05-13 17:47:57 -070026{
David Hendricks24452742014-07-02 13:50:57 -070027 /* Reserve bottom 0x150_0000 bytes for NSS, SMEM, etc. */
Julius Wernerec5e5e02014-08-20 15:29:56 -070028 reserved_ram_resource(dev, 0, (uintptr_t)_dram / KiB, RESERVED_SIZE_KB);
29 ram_resource(dev, 0, (uintptr_t)_dram / KiB + RESERVED_SIZE_KB,
David Hendricks24452742014-07-02 13:50:57 -070030 (CONFIG_DRAM_SIZE_MB * KiB) - RESERVED_SIZE_KB);
Vadim Bendebury41a5d0d2014-05-13 17:47:57 -070031}
32
Elyes HAOUASd6cd2552018-05-25 10:01:13 +020033static void soc_init(struct device *dev)
Vadim Bendebury41a5d0d2014-05-13 17:47:57 -070034{
Vadim Bendebury7c256402015-01-13 13:07:48 -080035 /*
36 * Do this in case console is not enabled: kernel's earlyprintk()
37 * should work no matter what the firmware console configuration is.
38 */
39 ipq806x_uart_init();
40
Vadim Bendebury41a5d0d2014-05-13 17:47:57 -070041 printk(BIOS_INFO, "CPU: Qualcomm 8064\n");
42}
43
44static struct device_operations soc_ops = {
45 .read_resources = soc_read_resources,
46 .init = soc_init,
47};
48
Elyes HAOUASd6cd2552018-05-25 10:01:13 +020049static void enable_soc_dev(struct device *dev)
Vadim Bendebury41a5d0d2014-05-13 17:47:57 -070050{
51 dev->ops = &soc_ops;
52}
53
54struct chip_operations soc_qualcomm_ipq806x_ops = {
55 CHIP_NAME("SOC Qualcomm 8064")
56 .enable_dev = enable_soc_dev,
57};