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Jimmy Huang13eada652015-07-31 17:10:50 +08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2015 MediaTek Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
Kyösti Mälkki13f66502019-03-03 08:01:05 +020016#include <device/mmio.h>
Jimmy Huang13eada652015-07-31 17:10:50 +080017#include <arch/mmu.h>
Jimmy Huang13eada652015-07-31 17:10:50 +080018#include <symbols.h>
Tristan Shiehc645a5a2018-07-04 13:37:39 +080019#include <soc/symbols.h>
Jimmy Huang13eada652015-07-31 17:10:50 +080020#include <soc/infracfg.h>
21#include <soc/mcucfg.h>
22#include <soc/mmu_operations.h>
23
Tristan Shiehc645a5a2018-07-04 13:37:39 +080024void mtk_soc_after_dram(void)
Jimmy Huang13eada652015-07-31 17:10:50 +080025{
Julius Werner7e0dea62019-02-20 18:39:22 -080026 mmu_config_range(_dram_dma, REGION_SIZE(dram_dma),
27 NONSECURE_UNCACHED_MEM);
Tristan Shiehc645a5a2018-07-04 13:37:39 +080028 mtk_mmu_disable_l2c_sram();
Jimmy Huang13eada652015-07-31 17:10:50 +080029}
30
Tristan Shiehc645a5a2018-07-04 13:37:39 +080031void mtk_soc_disable_l2c_sram(void)
Jimmy Huang13eada652015-07-31 17:10:50 +080032{
Jimmy Huang13eada652015-07-31 17:10:50 +080033 /* Return L2C SRAM back to L2 cache. Set it to 512KiB which is the max
34 * available L2 cache for A53 in MT8173. */
35 write32(&mt8173_mcucfg->mp0_ca7l_cache_config, 3 << 8);
36 /* turn off the l2c sram clock */
37 write32(&mt8173_infracfg->infra_pdn0, L2C_SRAM_PDN);
Jimmy Huang13eada652015-07-31 17:10:50 +080038}