blob: 19dce0002a66c57169529359f01f390b7a441161 [file] [log] [blame]
Andrey Petrova00e1042017-06-05 13:22:59 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Google Inc.
Subrata Banikb3585b92018-01-08 13:57:43 +05305 * Copyright (C) 2015-2018 Intel Corporation.
Andrey Petrova00e1042017-06-05 13:22:59 -07006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <arch/cpu.h>
Kyösti Mälkkif1b58b72019-03-01 13:43:02 +020018#include <device/pci_ops.h>
Andrey Petrova00e1042017-06-05 13:22:59 -070019#include <console/console.h>
20#include <cpu/x86/msr.h>
Usha Pe1508762019-11-28 10:21:02 +053021#include <cpu/x86/name.h>
Andrey Petrova00e1042017-06-05 13:22:59 -070022#include <device/pci.h>
23#include <device/pci_ids.h>
Subrata Banikb3585b92018-01-08 13:57:43 +053024#include <intelblocks/mp_init.h>
Andrey Petrova00e1042017-06-05 13:22:59 -070025#include <soc/bootblock.h>
Andrey Petrova00e1042017-06-05 13:22:59 -070026#include <soc/pch.h>
27#include <soc/pci_devs.h>
28#include <string.h>
29
30#define BIOS_SIGN_ID 0x8B
31
32static struct {
33 u32 cpuid;
34 const char *name;
35} cpu_table[] = {
36 { CPUID_CANNONLAKE_A0, "Cannonlake A0" },
37 { CPUID_CANNONLAKE_B0, "Cannonlake B0" },
38 { CPUID_CANNONLAKE_C0, "Cannonlake C0" },
Lijian Zhaoe9872282018-01-21 21:05:54 -080039 { CPUID_CANNONLAKE_D0, "Cannonlake D0" },
Maulikfc19ab52018-01-05 22:40:35 +053040 { CPUID_COFFEELAKE_D0, "Coffeelake D0" },
Subrata Banikd1dfba42019-02-21 17:01:21 +053041 { CPUID_WHISKEYLAKE_V0, "Whiskeylake V0" },
42 { CPUID_WHISKEYLAKE_W0, "Whiskeylake W0" },
praveen hodagatta praneshe26c4a42018-09-20 03:49:45 +080043 { CPUID_COFFEELAKE_U0, "Coffeelake U0 (6+2)" },
Felix Singerd298ffe2019-07-28 13:27:11 +020044 { CPUID_COFFEELAKE_B0, "Coffeelake B0" },
Lean Sheng Tan38c3ff72019-05-27 13:06:35 +080045 { CPUID_COFFEELAKE_P0, "Coffeelake P0" },
46 { CPUID_COFFEELAKE_R0, "Coffeelake R0" },
Ronak Kanabar128bb2a2019-01-29 19:52:53 +053047 { CPUID_COMETLAKE_U_A0, "Cometlake-U A0 (6+2)" },
48 { CPUID_COMETLAKE_U_K0_S0, "Cometlake-U K0/S0 (6+2)/(4+2)" },
Gaggery Tsaifdcc9ab2019-11-04 20:49:10 -080049 { CPUID_COMETLAKE_H_S_6_2_G0, "Cometlake-H/S G0 (6+2)" },
50 { CPUID_COMETLAKE_H_S_6_2_G1, "Cometlake-H/S G1 (6+2)" },
Ronak Kanabar128bb2a2019-01-29 19:52:53 +053051 { CPUID_COMETLAKE_H_S_10_2_P0, "Cometlake-H/S P0 (10+2)" },
Gaggery Tsaifdcc9ab2019-11-04 20:49:10 -080052 { CPUID_COMETLAKE_H_S_10_2_Q0_P1, "Cometlake-H/S Q0/P1 (10+2)" },
Andrey Petrova00e1042017-06-05 13:22:59 -070053};
54
55static struct {
56 u16 mchid;
57 const char *name;
58} mch_table[] = {
59 { PCI_DEVICE_ID_INTEL_CNL_ID_U, "Cannonlake-U" },
60 { PCI_DEVICE_ID_INTEL_CNL_ID_Y, "Cannonlake-Y" },
Subrata Banikab9f64d2019-02-22 13:25:04 +053061 { PCI_DEVICE_ID_INTEL_CFL_ID_U, "Coffeelake U (4+3e)" },
Christian Walterccac15a2019-08-13 09:55:37 +020062 { PCI_DEVICE_ID_INTEL_CFL_ID_U_2, "Coffeelake U (2)" },
Lean Sheng Tan38c3ff72019-05-27 13:06:35 +080063 { PCI_DEVICE_ID_INTEL_WHL_ID_W_4, "Whiskeylake W (4+2)" },
64 { PCI_DEVICE_ID_INTEL_WHL_ID_W_2, "Whiskeylake W (2+2)" },
praveen hodagatta praneshe26c4a42018-09-20 03:49:45 +080065 { PCI_DEVICE_ID_INTEL_CFL_ID_H, "Coffeelake-H" },
Christian Walterccac15a2019-08-13 09:55:37 +020066 { PCI_DEVICE_ID_INTEL_CFL_ID_H_4, "Coffeelake-H (4)" },
Lean Sheng Tan38c3ff72019-05-27 13:06:35 +080067 { PCI_DEVICE_ID_INTEL_CFL_ID_H_8, "Coffeelake-H (8+2)" },
praveen hodagatta praneshe26c4a42018-09-20 03:49:45 +080068 { PCI_DEVICE_ID_INTEL_CFL_ID_S, "Coffeelake-S" },
Christian Walterccac15a2019-08-13 09:55:37 +020069 { PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_2, "Coffeelake-S DT(2)" },
Felix Singerd298ffe2019-07-28 13:27:11 +020070 { PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_4, "Coffeelake-S DT(4)" },
Lean Sheng Tan38c3ff72019-05-27 13:06:35 +080071 { PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8, "Coffeelake-S DT(8+2)" },
Christian Walterccac15a2019-08-13 09:55:37 +020072 { PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_4, "Coffeelake-S WS(4+2)" },
73 { PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_6, "Coffeelake-S WS(6+2)" },
Lean Sheng Tan38c3ff72019-05-27 13:06:35 +080074 { PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8, "Coffeelake-S WS(8+2)" },
Christian Walterccac15a2019-08-13 09:55:37 +020075 { PCI_DEVICE_ID_INTEL_CFL_ID_S_S_4, "Coffeelake-S S(4)" },
76 { PCI_DEVICE_ID_INTEL_CFL_ID_S_S_6, "Coffeelake-S S(6)" },
77 { PCI_DEVICE_ID_INTEL_CFL_ID_S_S_8, "Coffeelake-S S(8)" },
Ronak Kanabarf606a2f2019-02-04 16:06:50 +053078 { PCI_DEVICE_ID_INTEL_CML_ULT, "CometLake-U (4+2)" },
Subrata Banikba8af582019-02-27 15:00:55 +053079 { PCI_DEVICE_ID_INTEL_CML_ULT_2_2, "CometLake-U (2+2)" },
Ronak Kanabarf606a2f2019-02-04 16:06:50 +053080 { PCI_DEVICE_ID_INTEL_CML_ULT_6_2, "CometLake-U (6+2)" },
81 { PCI_DEVICE_ID_INTEL_CML_ULX, "CometLake-ULX (4+2)" },
82 { PCI_DEVICE_ID_INTEL_CML_S, "CometLake-S (6+2)" },
Gaggery Tsaifdcc9ab2019-11-04 20:49:10 -080083 { PCI_DEVICE_ID_INTEL_CML_S_G0G1_P0P1_6_2, "CometLake-S G0/G1/P0/P1 (6+2)" },
84 { PCI_DEVICE_ID_INTEL_CML_S_P0P1_8_2, "CometLake-S P0/P1 (8+2)" },
85 { PCI_DEVICE_ID_INTEL_CML_S_P0P1_10_2, "CometLake-S P0/P1 (10+2)" },
Ronak Kanabarf606a2f2019-02-04 16:06:50 +053086 { PCI_DEVICE_ID_INTEL_CML_H, "CometLake-H (6+2)" },
Jamie Chen6bb9aaf2019-12-20 19:30:33 +080087 { PCI_DEVICE_ID_INTEL_CML_H_4_2, "CometLake-H (4+2)" },
Ronak Kanabarf606a2f2019-02-04 16:06:50 +053088 { PCI_DEVICE_ID_INTEL_CML_H_8_2, "CometLake-H (8+2)" },
Andrey Petrova00e1042017-06-05 13:22:59 -070089};
90
91static struct {
Subrata Banikec10fbb2017-12-07 11:48:48 +053092 u16 lpcid;
93 const char *name;
94} pch_table[] = {
95 { PCI_DEVICE_ID_INTEL_CNL_BASE_U_LPC, "Cannonlake-U Base" },
96 { PCI_DEVICE_ID_INTEL_CNL_U_PREMIUM_LPC, "Cannonlake-U Premium" },
97 { PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC, "Cannonlake-Y Premium" },
Felix Singerd298ffe2019-07-28 13:27:11 +020098 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_H310, "Cannonlake-H H310" },
99 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_H370, "Cannonlake-H H370" },
100 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_Z390, "Cannonlake-H Z390" },
praveen hodagatta praneshe26c4a42018-09-20 03:49:45 +0800101 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_Q370, "Cannonlake-H Q370" },
Felix Singerd298ffe2019-07-28 13:27:11 +0200102 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_B360, "Cannonlake-H B360" },
Lean Sheng Tan38c3ff72019-05-27 13:06:35 +0800103 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_C246, "Cannonlake-H C246" },
Felix Singerd298ffe2019-07-28 13:27:11 +0200104 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_C242, "Cannonlake-H C242" },
105 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_QM370, "Cannonlake-H QM370" },
106 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_HM370, "Cannonlake-H HM370" },
Nico Huber129bc4c2019-05-14 13:17:28 +0200107 { PCI_DEVICE_ID_INTEL_CNP_H_LPC_CM246, "Cannonlake-H CM246" },
Ronak Kanabarda7ffb482019-02-05 01:51:13 +0530108 { PCI_DEVICE_ID_INTEL_CMP_SUPER_U_LPC, "Cometlake-U Super" },
109 { PCI_DEVICE_ID_INTEL_CMP_PREMIUM_Y_LPC, "Cometlake-Y Premium" },
110 { PCI_DEVICE_ID_INTEL_CMP_PREMIUM_U_LPC, "Cometlake-U Premium" },
111 { PCI_DEVICE_ID_INTEL_CMP_BASE_U_LPC, "Cometlake-U Base" },
112 { PCI_DEVICE_ID_INTEL_CMP_SUPER_Y_LPC, "Cometlake-Y Super" },
Gaggery Tsaifdcc9ab2019-11-04 20:49:10 -0800113 { PCI_DEVICE_ID_INTEL_CMP_H_LPC_HM470, "Cometlake-H HM470" },
114 { PCI_DEVICE_ID_INTEL_CMP_H_LPC_WM490, "Cometlake-H WM490" },
115 { PCI_DEVICE_ID_INTEL_CMP_H_LPC_QM480, "Cometlake-H QM480" },
116 { PCI_DEVICE_ID_INTEL_CMP_H_LPC_W480, "Cometlake-H W480" },
117 { PCI_DEVICE_ID_INTEL_CMP_H_LPC_H470, "Cometlake-H H470" },
118 { PCI_DEVICE_ID_INTEL_CMP_H_LPC_Z490, "Cometlake-H Z490" },
119 { PCI_DEVICE_ID_INTEL_CMP_H_LPC_Q470, "Cometlake-H Q470" },
Subrata Banikec10fbb2017-12-07 11:48:48 +0530120};
121
122static struct {
Andrey Petrova00e1042017-06-05 13:22:59 -0700123 u16 igdid;
124 const char *name;
125} igd_table[] = {
126 { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_1, "Cannonlake ULX GT2" },
127 { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_2, "Cannonlake ULX GT1.5" },
128 { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_3, "Cannonlake ULX GT1" },
129 { PCI_DEVICE_ID_INTEL_CNL_GT2_ULX_4, "Cannonlake ULX GT0.5" },
130 { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_1, "Cannonlake ULT GT2" },
131 { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_2, "Cannonlake ULT GT1.5" },
132 { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_3, "Cannonlake ULT GT1" },
133 { PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4, "Cannonlake ULT GT0.5" },
Subrata Banikd1dfba42019-02-21 17:01:21 +0530134 { PCI_DEVICE_ID_INTEL_CFL_GT2_ULT, "Coffeelake ULT GT2" },
Lijian Zhao395f1e32019-04-14 12:27:02 -0700135 { PCI_DEVICE_ID_INTEL_WHL_GT1_ULT_1, "Whiskeylake ULT GT1" },
136 { PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT2" },
praveen hodagatta praneshe26c4a42018-09-20 03:49:45 +0800137 { PCI_DEVICE_ID_INTEL_CFL_H_GT2, "Coffeelake-H GT2" },
Nico Huberff3c9642019-05-14 13:18:05 +0200138 { PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2, "Coffeelake-H Xeon GT2" },
Lean Sheng Tan38c3ff72019-05-27 13:06:35 +0800139 { PCI_DEVICE_ID_INTEL_CFL_S_GT2_1, "Coffeelake-S GT2" },
140 { PCI_DEVICE_ID_INTEL_CFL_S_GT2_2, "Coffeelake-S GT2" },
141 { PCI_DEVICE_ID_INTEL_CFL_S_GT2_3, "Coffeelake-S GT2" },
Felix Singerd298ffe2019-07-28 13:27:11 +0200142 { PCI_DEVICE_ID_INTEL_CFL_S_GT2_4, "Coffeelake-S GT2" },
Christian Walter19b963c2019-12-09 15:07:13 +0100143 { PCI_DEVICE_ID_INTEL_CFL_U_GT2, "Coffeelake-U GT2" },
Ronak Kanabarf606a2f2019-02-04 16:06:50 +0530144 { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1, "CometLake ULT GT1" },
145 { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_2, "CometLake ULT GT1" },
146 { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_1, "CometLake ULT GT2" },
147 { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_2, "CometLake ULT GT2" },
148 { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_3, "CometLake ULT GT1" },
149 { PCI_DEVICE_ID_INTEL_CML_GT1_ULT_4, "CometLake ULT GT1" },
150 { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_3, "CometLake ULT GT2" },
151 { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_4, "CometLake ULT GT2" },
Meera Ravindranath970f1a42019-08-27 16:16:56 +0530152 { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_5, "CometLake ULT GT2" },
153 { PCI_DEVICE_ID_INTEL_CML_GT2_ULT_6, "CometLake ULT GT2" },
Ronak Kanabarf606a2f2019-02-04 16:06:50 +0530154 { PCI_DEVICE_ID_INTEL_CML_GT1_ULX_1, "CometLake ULX GT1" },
155 { PCI_DEVICE_ID_INTEL_CML_GT2_ULX_1, "CometLake ULX GT2" },
156 { PCI_DEVICE_ID_INTEL_CML_GT1_S_1, "CometLake S GT1" },
157 { PCI_DEVICE_ID_INTEL_CML_GT1_S_2, "CometLake S GT1" },
158 { PCI_DEVICE_ID_INTEL_CML_GT2_S_1, "CometLake S GT2" },
159 { PCI_DEVICE_ID_INTEL_CML_GT2_S_2, "CometLake S GT2" },
Gaggery Tsaifdcc9ab2019-11-04 20:49:10 -0800160 { PCI_DEVICE_ID_INTEL_CML_GT2_S_G0, "CometLake S GT2 G0" },
161 { PCI_DEVICE_ID_INTEL_CML_GT2_S_P0, "CometLake S GT2 P0" },
Ronak Kanabarf606a2f2019-02-04 16:06:50 +0530162 { PCI_DEVICE_ID_INTEL_CML_GT1_H_1, "CometLake H GT1" },
163 { PCI_DEVICE_ID_INTEL_CML_GT1_H_2, "CometLake H GT1" },
164 { PCI_DEVICE_ID_INTEL_CML_GT2_H_1, "CometLake H GT2" },
165 { PCI_DEVICE_ID_INTEL_CML_GT2_H_2, "CometLake H GT2" },
Gaggery Tsaifdcc9ab2019-11-04 20:49:10 -0800166 { PCI_DEVICE_ID_INTEL_CML_GT2_H_R0, "CometLake H GT2 R0" },
167 { PCI_DEVICE_ID_INTEL_CML_GT2_H_R1, "CometLake H GT2 R1" },
168
Andrey Petrova00e1042017-06-05 13:22:59 -0700169};
170
Elyes HAOUASc8a649c2018-06-10 23:36:44 +0200171static uint8_t get_dev_revision(pci_devfn_t dev)
Subrata Banikec10fbb2017-12-07 11:48:48 +0530172{
173 return pci_read_config8(dev, PCI_REVISION_ID);
174}
175
Elyes HAOUASc8a649c2018-06-10 23:36:44 +0200176static uint16_t get_dev_id(pci_devfn_t dev)
Subrata Banikec10fbb2017-12-07 11:48:48 +0530177{
178 return pci_read_config16(dev, PCI_DEVICE_ID);
179}
180
Andrey Petrova00e1042017-06-05 13:22:59 -0700181static void report_cpu_info(void)
182{
Usha Pe1508762019-11-28 10:21:02 +0530183 u32 i, cpu_id, cpu_feature_flag;
184 char cpu_name[49];
Andrey Petrova00e1042017-06-05 13:22:59 -0700185 int vt, txt, aes;
186 msr_t microcode_ver;
Elyes HAOUAS39303d52018-07-08 12:40:45 +0200187 static const char *const mode[] = {"NOT ", ""};
Andrey Petrova00e1042017-06-05 13:22:59 -0700188 const char *cpu_type = "Unknown";
189
Usha Pe1508762019-11-28 10:21:02 +0530190 fill_processor_name(cpu_name);
Andrey Petrova00e1042017-06-05 13:22:59 -0700191
192 microcode_ver.lo = 0;
193 microcode_ver.hi = 0;
194 wrmsr(BIOS_SIGN_ID, microcode_ver);
Subrata Banik53b08c32018-12-10 14:11:35 +0530195 cpu_id = cpu_get_cpuid();
Andrey Petrova00e1042017-06-05 13:22:59 -0700196 microcode_ver = rdmsr(BIOS_SIGN_ID);
197
198 /* Look for string to match the name */
199 for (i = 0; i < ARRAY_SIZE(cpu_table); i++) {
Subrata Banik53b08c32018-12-10 14:11:35 +0530200 if (cpu_table[i].cpuid == cpu_id) {
Andrey Petrova00e1042017-06-05 13:22:59 -0700201 cpu_type = cpu_table[i].name;
202 break;
203 }
204 }
205
206 printk(BIOS_DEBUG, "CPU: %s\n", cpu_name);
207 printk(BIOS_DEBUG, "CPU: ID %x, %s, ucode: %08x\n",
Subrata Banik53b08c32018-12-10 14:11:35 +0530208 cpu_id, cpu_type, microcode_ver.hi);
Andrey Petrova00e1042017-06-05 13:22:59 -0700209
Subrata Banik53b08c32018-12-10 14:11:35 +0530210 cpu_feature_flag = cpu_get_feature_flags_ecx();
211 aes = (cpu_feature_flag & CPUID_AES) ? 1 : 0;
212 txt = (cpu_feature_flag & CPUID_SMX) ? 1 : 0;
213 vt = (cpu_feature_flag & CPUID_VMX) ? 1 : 0;
Andrey Petrova00e1042017-06-05 13:22:59 -0700214 printk(BIOS_DEBUG,
215 "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
216 mode[aes], mode[txt], mode[vt]);
217}
218
219static void report_mch_info(void)
220{
221 int i;
Elyes HAOUASc8a649c2018-06-10 23:36:44 +0200222 pci_devfn_t dev = SA_DEV_ROOT;
Subrata Banikec10fbb2017-12-07 11:48:48 +0530223 uint16_t mchid = get_dev_id(dev);
224 uint8_t mch_revision = get_dev_revision(dev);
Andrey Petrova00e1042017-06-05 13:22:59 -0700225 const char *mch_type = "Unknown";
226
227 for (i = 0; i < ARRAY_SIZE(mch_table); i++) {
228 if (mch_table[i].mchid == mchid) {
229 mch_type = mch_table[i].name;
230 break;
231 }
232 }
233
234 printk(BIOS_DEBUG, "MCH: device id %04x (rev %02x) is %s\n",
Subrata Banikec10fbb2017-12-07 11:48:48 +0530235 mchid, mch_revision, mch_type);
236}
237
238static void report_pch_info(void)
239{
240 int i;
Elyes HAOUASc8a649c2018-06-10 23:36:44 +0200241 pci_devfn_t dev = PCH_DEV_LPC;
Subrata Banikec10fbb2017-12-07 11:48:48 +0530242 uint16_t lpcid = get_dev_id(dev);
243 const char *pch_type = "Unknown";
244
245 for (i = 0; i < ARRAY_SIZE(pch_table); i++) {
246 if (pch_table[i].lpcid == lpcid) {
247 pch_type = pch_table[i].name;
248 break;
249 }
250 }
251 printk(BIOS_DEBUG, "PCH: device id %04x (rev %02x) is %s\n",
252 lpcid, get_dev_revision(dev), pch_type);
Andrey Petrova00e1042017-06-05 13:22:59 -0700253}
254
255static void report_igd_info(void)
256{
257 int i;
Elyes HAOUASc8a649c2018-06-10 23:36:44 +0200258 pci_devfn_t dev = SA_DEV_IGD;
Subrata Banikec10fbb2017-12-07 11:48:48 +0530259 uint16_t igdid = get_dev_id(dev);
Andrey Petrova00e1042017-06-05 13:22:59 -0700260 const char *igd_type = "Unknown";
261
262 for (i = 0; i < ARRAY_SIZE(igd_table); i++) {
263 if (igd_table[i].igdid == igdid) {
264 igd_type = igd_table[i].name;
265 break;
266 }
267 }
268 printk(BIOS_DEBUG, "IGD: device id %04x (rev %02x) is %s\n",
Subrata Banikec10fbb2017-12-07 11:48:48 +0530269 igdid, get_dev_revision(dev), igd_type);
Andrey Petrova00e1042017-06-05 13:22:59 -0700270}
271
272void report_platform_info(void)
273{
274 report_cpu_info();
275 report_mch_info();
Subrata Banikec10fbb2017-12-07 11:48:48 +0530276 report_pch_info();
Andrey Petrova00e1042017-06-05 13:22:59 -0700277 report_igd_info();
278}