blob: 9118914e3c018706b8b006de2fe9ee4f60411d78 [file] [log] [blame]
Patrick Georgi0588d192009-08-12 15:00:51 +00001##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00002## This file is part of the coreboot project.
Patrick Georgi0588d192009-08-12 15:00:51 +00003##
Alexandru Gagniuc70c660f2012-08-23 02:32:58 -05004## Copyright (C) 2012 Alexandru Gagniuc <mr.nuke.me@gmail.com>
Stefan Reinauer16f515a2010-01-20 18:44:30 +00005## Copyright (C) 2009-2010 coresystems GmbH
Patrick Georgi0588d192009-08-12 15:00:51 +00006##
Stefan Reinauer16f515a2010-01-20 18:44:30 +00007## This program is free software; you can redistribute it and/or modify
8## it under the terms of the GNU General Public License as published by
9## the Free Software Foundation; version 2 of the License.
10##
11## This program is distributed in the hope that it will be useful,
12## but WITHOUT ANY WARRANTY; without even the implied warranty of
13## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14## GNU General Public License for more details.
15##
Patrick Georgi0588d192009-08-12 15:00:51 +000016
Uwe Hermannad8c95f2012-04-12 22:00:03 +020017mainmenu "coreboot configuration"
Patrick Georgi0588d192009-08-12 15:00:51 +000018
Uwe Hermannc04be932009-10-05 13:55:28 +000019menu "General setup"
20
Lee Leahybb70c402017-04-03 07:38:20 -070021config COREBOOT_BUILD
22 bool
23 default y
24
Uwe Hermannc04be932009-10-05 13:55:28 +000025config LOCALVERSION
Uwe Hermann168b11b2009-10-07 16:15:40 +000026 string "Local version string"
Uwe Hermannc04be932009-10-05 13:55:28 +000027 help
28 Append an extra string to the end of the coreboot version.
29
Uwe Hermann168b11b2009-10-07 16:15:40 +000030 This can be useful if, for instance, you want to append the
31 respective board's hostname or some other identifying string to
32 the coreboot version number, so that you can easily distinguish
33 boot logs of different boards from each other.
34
Arthur Heymans6f751542019-06-08 11:28:52 +020035config CONFIGURABLE_CBFS_PREFIX
36 bool
37 help
38 Select this to prompt to use to configure the prefix for cbfs files.
39
Arthur Heymans6010eb22019-10-06 13:34:20 +020040choice
41 prompt "CBFS prefix to use"
42 depends on CONFIGURABLE_CBFS_PREFIX
43 default CBFS_PREFIX_FALLBACK
44
45config CBFS_PREFIX_FALLBACK
46 bool "fallback"
47
48config CBFS_PREFIX_NORMAL
49 bool "normal"
50
51config CBFS_PREFIX_DIY
52 bool "Define your own cbfs prefix"
53
54endchoice
55
Patrick Georgi4b8a2412010-02-09 19:35:16 +000056config CBFS_PREFIX
Arthur Heymans6010eb22019-10-06 13:34:20 +020057 string "CBFS prefix to use" if CBFS_PREFIX_DIY
58 default "fallback" if !CONFIGURABLE_CBFS_PREFIX || CBFS_PREFIX_FALLBACK
59 default "normal" if CBFS_PREFIX_NORMAL
Patrick Georgi4b8a2412010-02-09 19:35:16 +000060 help
61 Select the prefix to all files put into the image. It's "fallback"
62 by default, "normal" is a common alternative.
63
Patrick Georgi23d89cc2010-03-16 01:17:19 +000064choice
Uwe Hermannad8c95f2012-04-12 22:00:03 +020065 prompt "Compiler to use"
Patrick Georgi23d89cc2010-03-16 01:17:19 +000066 default COMPILER_GCC
67 help
68 This option allows you to select the compiler used for building
69 coreboot.
Martin Rotha5a628e82016-01-19 12:01:09 -070070 You must build the coreboot crosscompiler for the board that you
71 have selected.
72
73 To build all the GCC crosscompilers (takes a LONG time), run:
74 make crossgcc
75
76 For help on individual architectures, run the command:
77 make help_toolchain
Patrick Georgi23d89cc2010-03-16 01:17:19 +000078
79config COMPILER_GCC
80 bool "GCC"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020081 help
82 Use the GNU Compiler Collection (GCC) to build coreboot.
83
84 For details see http://gcc.gnu.org.
85
Patrick Georgi23d89cc2010-03-16 01:17:19 +000086config COMPILER_LLVM_CLANG
Martin Rotha5a628e82016-01-19 12:01:09 -070087 bool "LLVM/clang (TESTING ONLY - Not currently working)"
Uwe Hermannad8c95f2012-04-12 22:00:03 +020088 help
Martin Rotha5a628e82016-01-19 12:01:09 -070089 Use LLVM/clang to build coreboot. To use this, you must build the
90 coreboot version of the clang compiler. Run the command
91 make clang
92 Note that this option is not currently working correctly and should
93 really only be selected if you're trying to work on getting clang
94 operational.
Uwe Hermannad8c95f2012-04-12 22:00:03 +020095
96 For details see http://clang.llvm.org.
97
Patrick Georgi23d89cc2010-03-16 01:17:19 +000098endchoice
99
Patrick Georgi9b0de712013-12-29 18:45:23 +0100100config ANY_TOOLCHAIN
101 bool "Allow building with any toolchain"
102 default n
Patrick Georgi9b0de712013-12-29 18:45:23 +0100103 help
104 Many toolchains break when building coreboot since it uses quite
105 unusual linker features. Unless developers explicitely request it,
106 we'll have to assume that they use their distro compiler by mistake.
107 Make sure that using patched compilers is a conscious decision.
108
Patrick Georgi516a2a72010-03-25 21:45:25 +0000109config CCACHE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200110 bool "Use ccache to speed up (re)compilation"
Patrick Georgi516a2a72010-03-25 21:45:25 +0000111 default n
112 help
113 Enables the use of ccache for faster builds.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200114
115 Requires the ccache utility in your system $PATH.
116
117 For details see https://ccache.samba.org.
Patrick Georgi516a2a72010-03-25 21:45:25 +0000118
Sol Boucher69b88bf2015-02-26 11:47:19 -0800119config FMD_GENPARSER
120 bool "Generate flashmap descriptor parser using flex and bison"
121 default n
Sol Boucher69b88bf2015-02-26 11:47:19 -0800122 help
123 Enable this option if you are working on the flashmap descriptor
124 parser and made changes to fmd_scanner.l or fmd_parser.y.
125
126 Otherwise, say N to use the provided pregenerated scanner/parser.
127
Martin Rothf411b702017-04-09 19:12:42 -0600128config UTIL_GENPARSER
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100129 bool "Generate SCONFIG & BINCFG parser using flex and bison"
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000130 default n
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000131 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200132 Enable this option if you are working on the sconfig device tree
Denis 'GNUtoo' Carikli780e9312018-01-10 14:35:55 +0100133 parser or bincfg and made changes to the .l or .y files.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200134
Sol Boucher69b88bf2015-02-26 11:47:19 -0800135 Otherwise, say N to use the provided pregenerated scanner/parser.
Stefan Reinauer9bf78102010-08-09 13:28:18 +0000136
Joe Korty6d772522010-05-19 18:41:15 +0000137config USE_OPTION_TABLE
138 bool "Use CMOS for configuration values"
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000139 depends on HAVE_OPTION_TABLE
Joe Korty6d772522010-05-19 18:41:15 +0000140 help
141 Enable this option if coreboot shall read options from the "CMOS"
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200142 NVRAM instead of using hard-coded values.
Joe Korty6d772522010-05-19 18:41:15 +0000143
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600144config STATIC_OPTION_TABLE
145 bool "Load default configuration values into CMOS on each boot"
Timothy Pearsonf20c6e82015-02-14 16:15:31 -0600146 depends on USE_OPTION_TABLE
147 help
148 Enable this option to reset "CMOS" NVRAM values to default on
149 every boot. Use this if you want the NVRAM configuration to
150 never be modified from its default values.
151
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000152config COMPRESS_RAMSTAGE
153 bool "Compress ramstage with LZMA"
Subrata Banikb5962a92019-06-08 12:29:02 +0530154 depends on HAVE_RAMSTAGE
Martin Roth75e5cb72016-12-15 15:05:37 -0700155 # Default value set at the end of the file
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000156 help
Arthur Heymans7f229332019-11-08 11:59:25 +0100157 Compress ramstage to save memory in the flash image.
Sven Schnelle8eee19d2011-05-02 19:53:04 +0000158
Julius Werner09f29212015-09-29 13:51:35 -0700159config COMPRESS_PRERAM_STAGES
160 bool "Compress romstage and verstage with LZ4"
Subrata Banikb5962a92019-06-08 12:29:02 +0530161 depends on !ARCH_X86 && (HAVE_ROMSTAGE || HAVE_VERSTAGE)
Martin Roth75e5cb72016-12-15 15:05:37 -0700162 # Default value set at the end of the file
Julius Werner09f29212015-09-29 13:51:35 -0700163 help
164 Compress romstage and (if it exists) verstage with LZ4 to save flash
165 space and speed up boot, since the time for reading the image from SPI
166 (and in the vboot case verifying it) is usually much greater than the
167 time spent decompressing. Doesn't work for XIP stages (assume all
168 ARCH_X86 for now) for obvious reasons.
169
Julius Werner99f46832018-05-16 14:14:04 -0700170config COMPRESS_BOOTBLOCK
171 bool
Subrata Banikb5962a92019-06-08 12:29:02 +0530172 depends on HAVE_BOOTBLOCK
Julius Werner99f46832018-05-16 14:14:04 -0700173 help
174 This option can be used to compress the bootblock with LZ4 and attach
175 a small self-decompression stub to its front. This can drastically
176 reduce boot time on platforms where the bootblock is loaded over a
177 very slow connection and bootblock size trumps all other factors for
Jonathan Neuschäfer2930a722018-09-29 17:42:52 +0200178 speed. Since using this option usually requires changes to the
Julius Werner99f46832018-05-16 14:14:04 -0700179 SoC memlayout and possibly extra support code, it should not be
180 user-selectable. (There's no real point in offering this to the user
181 anyway... if it works and saves boot time, you would always want it.)
182
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200183config INCLUDE_CONFIG_FILE
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200184 bool "Include the coreboot .config file into the ROM image"
Martin Roth75e5cb72016-12-15 15:05:37 -0700185 # Default value set at the end of the file
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200186 help
187 Include the .config file that was used to compile coreboot
188 in the (CBFS) ROM image. This is useful if you want to know which
189 options were used to build a specific coreboot.rom image.
190
Daniele Forsi53847a22014-07-22 18:00:56 +0200191 Saying Y here will increase the image size by 2-3KB.
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200192
193 You can use the following command to easily list the options:
194
195 grep -a CONFIG_ coreboot.rom
196
197 Alternatively, you can also use cbfstool to print the image
198 contents (including the raw 'config' item we're looking for).
199
200 Example:
201
202 $ cbfstool coreboot.rom print
203 coreboot.rom: 4096 kB, bootblocksize 1008, romsize 4194304,
204 offset 0x0
205 Alignment: 64 bytes
Steve Goodrichf0269122012-05-18 11:18:47 -0600206
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200207 Name Offset Type Size
208 cmos_layout.bin 0x0 cmos layout 1159
209 fallback/romstage 0x4c0 stage 339756
Daniele Forsi53847a22014-07-22 18:00:56 +0200210 fallback/ramstage 0x53440 stage 186664
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200211 fallback/payload 0x80dc0 payload 51526
212 config 0x8d740 raw 3324
213 (empty) 0x8e480 null 3610440
Cristian Măgherușan-Stanciud367b002011-06-19 03:03:28 +0200214
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700215config COLLECT_TIMESTAMPS
216 bool "Create a table of timestamps collected during boot"
Paul Menzel4e4a7632015-10-11 11:57:44 +0200217 default y if ARCH_X86
Vadim Bendebury9202473d2011-09-21 14:46:43 -0700218 help
Uwe Hermannad8c95f2012-04-12 22:00:03 +0200219 Make coreboot create a table of timer-ID/timer-value pairs to
220 allow measuring time spent at different phases of the boot process.
221
Martin Rothb22bbe22018-03-07 15:32:16 -0700222config TIMESTAMPS_ON_CONSOLE
223 bool "Print the timestamp values on the console"
224 default n
225 depends on COLLECT_TIMESTAMPS
226 help
Kyösti Mälkki8b93cb72020-01-09 08:41:46 +0200227 Print the timestamps to the debug console if enabled at level info.
Martin Rothb22bbe22018-03-07 15:32:16 -0700228
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200229config USE_BLOBS
230 bool "Allow use of binary-only repository"
Patrick Georgi7e9b9d82012-04-30 21:06:10 +0200231 help
232 This draws in the blobs repository, which contains binary files that
233 might be required for some chipsets or boards.
234 This flag ensures that a "Free" option remains available for users.
235
Marshall Dawson20ce4002019-10-28 15:55:03 -0600236config USE_AMD_BLOBS
237 bool "Allow AMD blobs repository (with license agreement)"
238 depends on USE_BLOBS
239 help
240 This draws in the amd_blobs repository, which contains binary files
241 distributed by AMD, including VBIOS, PSP bootloaders, SMU firmwares,
242 etc. Selecting this item to download or clone the repo implies your
243 agreement to the AMD license agreement. A copy of the license text
244 may be reviewed by reading Documentation/soc/amd/amdblobs_license.md,
245 and your copy of the license is present in the repo once downloaded.
246
247 Note that for some products, omitting PSP, SMU images, or other items
248 may result in a nonbooting coreboot.rom.
249
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800250config COVERAGE
251 bool "Code coverage support"
252 depends on COMPILER_GCC
Stefan Reinauerd37ab452012-12-18 16:23:28 -0800253 help
254 Add code coverage support for coreboot. This will store code
255 coverage information in CBMEM for extraction from user space.
256 If unsure, say N.
257
Ryan Salsamendiab37e9a2017-06-11 21:07:31 -0700258config UBSAN
259 bool "Undefined behavior sanitizer support"
260 default n
261 help
262 Instrument the code with checks for undefined behavior. If unsure,
263 say N because it adds a small performance penalty and may abort
264 on code that happens to work in spite of the UB.
265
Stefan Reinauer58470e32014-10-17 13:08:36 +0200266config RELOCATABLE_RAMSTAGE
Kyösti Mälkki730df3c2016-06-18 07:39:31 +0300267 bool
Nico Huberd83bd532019-12-08 12:05:21 +0100268 default y if ARCH_X86
Vladimir Serbinenko633352c2015-05-30 22:21:37 +0200269 select RELOCATABLE_MODULES
Stefan Reinauer58470e32014-10-17 13:08:36 +0200270 help
271 The reloctable ramstage support allows for the ramstage to be built
272 as a relocatable module. The stage loader can identify a place
273 out of the OS way so that copying memory is unnecessary during an S3
274 wake. When selecting this option the romstage is responsible for
275 determing a stack location to use for loading the ramstage.
276
Kyösti Mälkki6766f4f2019-12-18 00:19:06 +0200277choice
278 prompt "Stage Cache for ACPI S3 resume"
279 default NO_STAGE_CACHE if !HAVE_ACPI_RESUME || !RELOCATABLE_RAMSTAGE
280 default TSEG_STAGE_CACHE if SMM_TSEG
281
282config NO_STAGE_CACHE
283 bool "Disabled"
284 help
285 Do not save any component in stage cache for resume path. On resume,
286 all components would be read back from CBFS again.
287
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +0300288config TSEG_STAGE_CACHE
Kyösti Mälkki6766f4f2019-12-18 00:19:06 +0200289 bool "TSEG"
290 depends on SMM_TSEG
Stefan Reinauer58470e32014-10-17 13:08:36 +0200291 help
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +0300292 The option enables stage cache support for platform. Platform
293 can stash copies of postcar, ramstage and raw runtime data
294 inside SMM TSEG, to be restored on S3 resume path.
295
296config CBMEM_STAGE_CACHE
Kyösti Mälkki6766f4f2019-12-18 00:19:06 +0200297 bool "CBMEM"
298 depends on !SMM_TSEG
Kyösti Mälkki0a4457f2019-08-01 20:29:14 +0300299 help
300 The option enables stage cache support for platform. Platform
301 can stash copies of postcar, ramstage and raw runtime data
302 inside CBMEM.
303
304 While the approach is faster than reloading stages from boot media
305 it is also a possible attack scenario via which OS can possibly
306 circumvent SMM locks and SPI write protections.
307
308 If unsure, select 'N'
Stefan Reinauer58470e32014-10-17 13:08:36 +0200309
Kyösti Mälkki6766f4f2019-12-18 00:19:06 +0200310endchoice
311
Stefan Reinauer58470e32014-10-17 13:08:36 +0200312config UPDATE_IMAGE
313 bool "Update existing coreboot.rom image"
Stefan Reinauer58470e32014-10-17 13:08:36 +0200314 help
315 If this option is enabled, no new coreboot.rom file
316 is created. Instead it is expected that there already
317 is a suitable file for further processing.
318 The bootblock will not be modified.
319
Martin Roth5942e062016-01-20 14:59:21 -0700320 If unsure, select 'N'
321
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400322config BOOTSPLASH_IMAGE
323 bool "Add a bootsplash image"
324 help
325 Select this option if you have a bootsplash image that you would
326 like to add to your ROM.
327
328 This will only add the image to the ROM. To actually run it check
329 options under 'Display' section.
330
331config BOOTSPLASH_FILE
332 string "Bootsplash path and filename"
333 depends on BOOTSPLASH_IMAGE
Martin Roth75e5cb72016-12-15 15:05:37 -0700334 # Default value set at the end of the file
Konstantin Aladyshev6544cb32015-01-24 18:52:10 +0400335 help
336 The path and filename of the file to use as graphical bootsplash
337 screen. The file format has to be jpg.
338
Nico Huber94cdec62019-06-06 19:36:02 +0200339config HAVE_RAMPAYLOAD
340 bool
341
Subrata Banik7e893a02019-05-06 14:17:41 +0530342config RAMPAYLOAD
343 bool "Enable coreboot flow without executing ramstage"
Subrata Banik86dbe0f2019-06-28 18:18:37 +0530344 default y if ARCH_X86
Nico Huber94cdec62019-06-06 19:36:02 +0200345 depends on HAVE_RAMPAYLOAD
Subrata Banik7e893a02019-05-06 14:17:41 +0530346 help
347 If this option is enabled, coreboot flow will skip ramstage
348 loading and execution of ramstage to load payload.
349
350 Instead it is expected to load payload from postcar stage itself.
351
352 In this flow coreboot will perform basic x86 initialization
353 (DRAM resource allocation), MTRR programming,
354 Skip PCI enumeration logic and only allocate BAR for fixed devices
355 (bootable devices, TPM over GSPI).
356
Uwe Hermannc04be932009-10-05 13:55:28 +0000357endmenu
358
Martin Roth026e4dc2015-06-19 23:17:15 -0600359menu "Mainboard"
360
Stefan Reinauera48ca842015-04-04 01:58:28 +0200361source "src/mainboard/Kconfig"
Stefan Reinauer8aedcbc2010-12-16 23:37:17 +0000362
Marshall Dawsone9375132016-09-04 08:38:33 -0600363config DEVICETREE
364 string
365 default "devicetree.cb"
366 help
367 This symbol allows mainboards to select a different file under their
368 mainboard directory for the devicetree.cb file. This allows the board
369 variants that need different devicetrees to be in the same directory.
370
371 Examples: "devicetree.variant.cb"
372 "variant/devicetree.cb"
373
Furquan Shaikhf2419982018-06-21 18:50:48 -0700374config OVERRIDE_DEVICETREE
375 string
376 default ""
377 help
378 This symbol allows variants to provide an override devicetree file to
379 override the registers and/or add new devices on top of the ones
380 provided by baseboard devicetree using CONFIG_DEVICETREE.
381
382 Examples: "devicetree.variant-override.cb"
383 "variant/devicetree-override.cb"
384
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200385config FMDFILE
386 string "fmap description file in fmd format"
Patrick Georgi5d7ab392015-12-12 00:23:15 +0100387 default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
Patrick Georgi8a3592e2015-09-16 18:10:52 +0200388 default ""
389 help
390 The build system creates a default FMAP from ROM_SIZE and CBFS_SIZE,
391 but in some cases more complex setups are required.
392 When an fmd is specified, it overrides the default format.
393
Arthur Heymans965881b2019-09-25 13:18:52 +0200394config CBFS_SIZE
395 hex "Size of CBFS filesystem in ROM"
396 depends on FMDFILE = ""
397 # Default value set at the end of the file
398 help
399 This is the part of the ROM actually managed by CBFS, located at the
400 end of the ROM (passed through cbfstool -o) on x86 and at at the start
401 of the ROM (passed through cbfstool -s) everywhere else. It defaults
402 to span the whole ROM on all but Intel systems that use an Intel Firmware
403 Descriptor. It can be overridden to make coreboot live alongside other
404 components like ChromeOS's vboot/FMAP or Intel's IFD / ME / TXE
405 binaries. This symbol should only be used to generate a default FMAP and
406 is unused when a non-default fmd file is provided via CONFIG_FMDFILE.
407
Martin Rothda1ca202015-12-26 16:51:16 -0700408endmenu
409
Martin Rothb09a5692016-01-24 19:38:33 -0700410# load site-local kconfig to allow user specific defaults and overrides
411source "site-local/Kconfig"
412
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200413config SYSTEM_TYPE_LAPTOP
Martin Roth595e7772015-04-26 18:53:26 -0600414 default n
415 bool
Vladimir Serbinenkoa9db82f2014-10-16 13:21:47 +0200416
Duncan Laurie8312df42019-02-01 11:33:57 -0800417config SYSTEM_TYPE_TABLET
418 default n
419 bool
420
421config SYSTEM_TYPE_DETACHABLE
422 default n
423 bool
424
425config SYSTEM_TYPE_CONVERTIBLE
426 default n
427 bool
428
Werner Zehc0fb3612016-01-14 15:08:36 +0100429config CBFS_AUTOGEN_ATTRIBUTES
430 default n
431 bool
432 help
433 If this option is selected, every file in cbfs which has a constraint
434 regarding position or alignment will get an additional file attribute
435 which describes this constraint.
436
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000437menu "Chipset"
438
Duncan Lauried2119762015-06-08 18:11:56 -0700439comment "SoC"
Chris Chingaa8e5d32017-10-20 10:43:39 -0600440source "src/soc/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000441comment "CPU"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200442source "src/cpu/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000443comment "Northbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200444source "src/northbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000445comment "Southbridge"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200446source "src/southbridge/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000447comment "Super I/O"
Omar Pakker57603e22016-07-29 23:31:45 +0200448source "src/superio/*/*/Kconfig"
Sven Schnelle7592e8b2011-01-27 11:43:03 +0000449comment "Embedded Controllers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200450source "src/ec/acpi/Kconfig"
451source "src/ec/*/*/Kconfig"
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000452
Martin Roth59aa2b12015-06-20 16:17:12 -0600453source "src/southbridge/intel/common/firmware/Kconfig"
Martin Rothe1523ec2015-06-19 22:30:43 -0600454source "src/vendorcode/*/Kconfig"
Martin Roth59aa2b12015-06-20 16:17:12 -0600455
Martin Rothe1523ec2015-06-19 22:30:43 -0600456source "src/arch/*/Kconfig"
457
Uwe Hermann63a8f2a2009-10-26 21:42:13 +0000458endmenu
Patrick Georgi0588d192009-08-12 15:00:51 +0000459
Stefan Reinauera48ca842015-04-04 01:58:28 +0200460source "src/device/Kconfig"
Stefan Reinauer95a63962012-11-13 17:00:01 -0800461
Rudolf Marekd9c25492010-05-16 15:31:53 +0000462menu "Generic Drivers"
Stefan Reinauera48ca842015-04-04 01:58:28 +0200463source "src/drivers/*/Kconfig"
Stefan Reinauer86ddd732016-03-11 20:22:28 -0800464source "src/drivers/*/*/Kconfig"
Lee Leahy48dbc662017-05-08 16:56:03 -0700465source "src/commonlib/storage/Kconfig"
Rudolf Marekd9c25492010-05-16 15:31:53 +0000466endmenu
467
Philipp Deppenwiese1899fbe2017-10-16 17:09:33 +0200468menu "Security"
469
470source "src/security/Kconfig"
Wim Vervoorne32d16f2019-11-14 14:10:28 +0100471source "src/vendorcode/eltan/security/Kconfig"
Philipp Deppenwiese1899fbe2017-10-16 17:09:33 +0200472
473endmenu
474
Martin Roth09210a12016-05-17 11:28:23 -0600475source "src/acpi/Kconfig"
476
Aaron Durbin4a36c4e2016-08-11 11:02:26 -0500477# This option is for the current boards/chipsets where SPI flash
478# is not the boot device. Currently nearly all boards/chipsets assume
479# SPI flash is the boot device.
480config BOOT_DEVICE_NOT_SPI_FLASH
481 bool
482 default n
483
484config BOOT_DEVICE_SPI_FLASH
485 bool
486 default y if !BOOT_DEVICE_NOT_SPI_FLASH
487 default n
488
Aaron Durbin16c173f2016-08-11 14:04:10 -0500489config BOOT_DEVICE_MEMORY_MAPPED
490 bool
491 default y if ARCH_X86 && BOOT_DEVICE_SPI_FLASH
492 default n
493 help
494 Inform system if SPI is memory-mapped or not.
495
Aaron Durbine8e118d2016-08-12 15:00:10 -0500496config BOOT_DEVICE_SUPPORTS_WRITES
497 bool
498 default n
499 help
500 Indicate that the platform has writable boot device
501 support.
502
Patrick Georgi0770f252015-04-22 13:28:21 +0200503config RTC
504 bool
505 default n
506
Patrick Georgi0588d192009-08-12 15:00:51 +0000507config HEAP_SIZE
508 hex
Marty E. Plummer0987e432019-04-22 20:46:27 -0500509 default 0x100000 if FLATTENED_DEVICE_TREE
Myles Watson04000f42009-10-16 19:12:49 +0000510 default 0x4000
Patrick Georgi0588d192009-08-12 15:00:51 +0000511
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700512config STACK_SIZE
513 hex
Julius Werner66a476a2015-10-12 16:45:21 -0700514 default 0x1000 if ARCH_X86
515 default 0x0
Julius Wernerc3e7c4e2014-09-19 13:18:16 -0700516
Patrick Georgi0588d192009-08-12 15:00:51 +0000517config MAX_CPUS
518 int
519 default 1
520
Stefan Reinauera48ca842015-04-04 01:58:28 +0200521source "src/console/Kconfig"
Patrick Georgi0588d192009-08-12 15:00:51 +0000522
523config HAVE_ACPI_RESUME
524 bool
525 default n
Kyösti Mälkki7cd2c072018-06-03 23:04:28 +0300526 depends on RELOCATABLE_RAMSTAGE
Patrick Georgi0588d192009-08-12 15:00:51 +0000527
Aaron Durbin87c9fae2016-01-22 15:26:04 -0600528config RESUME_PATH_SAME_AS_BOOT
529 bool
530 default y if ARCH_X86
531 depends on HAVE_ACPI_RESUME
532 help
533 This option indicates that when a system resumes it takes the
534 same path as a regular boot. e.g. an x86 system runs from the
535 reset vector at 0xfffffff0 on both resume and warm/cold boot.
536
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300537config NO_MONOTONIC_TIMER
Aaron Durbina4217912013-04-29 22:31:51 -0500538 def_bool n
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300539
540config HAVE_MONOTONIC_TIMER
541 bool
542 depends on !NO_MONOTONIC_TIMER
Kyösti Mälkkib28b6b52019-07-01 15:38:25 +0300543 default y
Aaron Durbina4217912013-04-29 22:31:51 -0500544 help
545 The board/chipset provides a monotonic timer.
546
Aaron Durbine5e36302014-09-25 10:05:15 -0500547config GENERIC_UDELAY
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300548 bool
Aaron Durbine5e36302014-09-25 10:05:15 -0500549 depends on HAVE_MONOTONIC_TIMER
Kyösti Mälkki76c43862019-07-01 17:25:41 +0300550 default y if !ARCH_X86
Aaron Durbine5e36302014-09-25 10:05:15 -0500551 help
552 The board/chipset uses a generic udelay function utilizing the
553 monotonic timer.
554
Aaron Durbin340ca912013-04-30 09:58:12 -0500555config TIMER_QUEUE
556 def_bool n
557 depends on HAVE_MONOTONIC_TIMER
558 help
Kyösti Mälkkiecd84242013-09-13 07:57:49 +0300559 Provide a timer queue for performing time-based callbacks.
Aaron Durbin340ca912013-04-30 09:58:12 -0500560
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500561config COOP_MULTITASKING
562 def_bool n
Aaron Durbin38c326d2013-05-06 12:22:23 -0500563 depends on TIMER_QUEUE && ARCH_X86
Aaron Durbin4409a5e2013-05-06 12:20:52 -0500564 help
565 Cooperative multitasking allows callbacks to be multiplexed on the
566 main thread of ramstage. With this enabled it allows for multiple
567 execution paths to take place when they have udelay() calls within
568 their code.
569
570config NUM_THREADS
571 int
572 default 4
573 depends on COOP_MULTITASKING
574 help
575 How many execution threads to cooperatively multitask with.
576
Patrick Georgi0588d192009-08-12 15:00:51 +0000577config HAVE_OPTION_TABLE
578 bool
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000579 default n
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000580 help
581 This variable specifies whether a given board has a cmos.layout
582 file containing NVRAM/CMOS bit definitions.
Edwin Beasanteb50c7d2010-07-06 21:05:04 +0000583 It defaults to 'n' but can be selected in mainboard/*/Kconfig.
Patrick Georgi0588d192009-08-12 15:00:51 +0000584
Patrick Georgi0588d192009-08-12 15:00:51 +0000585config PCI_IO_CFG_EXT
586 bool
587 default n
588
589config IOAPIC
590 bool
591 default n
592
Myles Watson45bb25f2009-09-22 18:49:08 +0000593config USE_WATCHDOG_ON_BOOT
594 bool
595 default n
596
Myles Watson45bb25f2009-09-22 18:49:08 +0000597config GFXUMA
598 bool
Myles Watsond73c1b52009-10-26 15:14:07 +0000599 default n
Myles Watson45bb25f2009-09-22 18:49:08 +0000600 help
601 Enable Unified Memory Architecture for graphics.
602
Myles Watsonb8e20272009-10-15 13:35:47 +0000603config HAVE_ACPI_TABLES
604 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000605 help
606 This variable specifies whether a given board has ACPI table support.
607 It is usually set in mainboard/*/Kconfig.
Myles Watsonb8e20272009-10-15 13:35:47 +0000608
609config HAVE_MP_TABLE
610 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000611 help
612 This variable specifies whether a given board has MP table support.
613 It is usually set in mainboard/*/Kconfig.
614 Whether or not the MP table is actually generated by coreboot
615 is configurable by the user via GENERATE_MP_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000616
617config HAVE_PIRQ_TABLE
618 bool
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000619 help
620 This variable specifies whether a given board has PIRQ table support.
621 It is usually set in mainboard/*/Kconfig.
622 Whether or not the PIRQ table is actually generated by coreboot
623 is configurable by the user via GENERATE_PIRQ_TABLE.
Myles Watsonb8e20272009-10-15 13:35:47 +0000624
Vladimir Serbinenkoc21e0732014-10-16 12:48:19 +0200625config COMMON_FADT
626 bool
627 default n
628
Aaron Durbin9420a522015-11-17 16:31:00 -0600629config ACPI_NHLT
630 bool
631 default n
632 help
633 Build support for NHLT (non HD Audio) ACPI table generation.
634
Marshall Dawson991467d2018-09-04 12:32:56 -0600635config ACPI_BERT
636 bool
637 depends on HAVE_ACPI_TABLES
638 help
639 Build an ACPI Boot Error Record Table.
640
Myles Watsond73c1b52009-10-26 15:14:07 +0000641#These Options are here to avoid "undefined" warnings.
642#The actual selection and help texts are in the following menu.
643
Uwe Hermann168b11b2009-10-07 16:15:40 +0000644menu "System tables"
Myles Watson45bb25f2009-09-22 18:49:08 +0000645
Myles Watsonb8e20272009-10-15 13:35:47 +0000646config GENERATE_MP_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800647 prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
648 bool
649 default HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000650 help
651 Generate an MP table (conforming to the Intel MultiProcessor
652 specification 1.4) for this board.
653
654 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000655
Myles Watsonb8e20272009-10-15 13:35:47 +0000656config GENERATE_PIRQ_TABLE
Stefan Reinauer56cd70b2012-11-13 17:33:08 -0800657 prompt "Generate a PIRQ table" if HAVE_PIRQ_TABLE
658 bool
659 default HAVE_PIRQ_TABLE
Uwe Hermann6ba13bb2009-10-15 17:49:07 +0000660 help
661 Generate a PIRQ table for this board.
662
663 If unsure, say Y.
Myles Watson45bb25f2009-09-22 18:49:08 +0000664
Sven Schnelle164bcfd2011-08-14 20:56:34 +0200665config GENERATE_SMBIOS_TABLES
666 depends on ARCH_X86
667 bool "Generate SMBIOS tables"
668 default y
669 help
670 Generate SMBIOS tables for this board.
671
672 If unsure, say Y.
673
Vladimir Serbinenko0afdec42015-05-30 23:08:26 +0200674config SMBIOS_PROVIDED_BY_MOBO
675 bool
676 default n
677
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200678config MAINBOARD_SERIAL_NUMBER
Nico Huberebd8a4f2017-11-01 09:49:16 +0100679 prompt "SMBIOS Serial Number" if !SMBIOS_PROVIDED_BY_MOBO
680 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200681 depends on GENERATE_SMBIOS_TABLES
682 default "123456789"
Martin Roth595e7772015-04-26 18:53:26 -0600683 help
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200684 The Serial Number to store in SMBIOS structures.
685
686config MAINBOARD_VERSION
Nico Huberebd8a4f2017-11-01 09:49:16 +0100687 prompt "SMBIOS Version Number" if !SMBIOS_PROVIDED_BY_MOBO
688 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200689 depends on GENERATE_SMBIOS_TABLES
690 default "1.0"
691 help
692 The Version Number to store in SMBIOS structures.
693
694config MAINBOARD_SMBIOS_MANUFACTURER
Nico Huberebd8a4f2017-11-01 09:49:16 +0100695 prompt "SMBIOS Manufacturer" if !SMBIOS_PROVIDED_BY_MOBO
696 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200697 depends on GENERATE_SMBIOS_TABLES
698 default MAINBOARD_VENDOR
699 help
700 Override the default Manufacturer stored in SMBIOS structures.
701
702config MAINBOARD_SMBIOS_PRODUCT_NAME
Nico Huberebd8a4f2017-11-01 09:49:16 +0100703 prompt "SMBIOS Product name" if !SMBIOS_PROVIDED_BY_MOBO
704 string
Stefan Reinauer6023ca42014-10-17 13:28:15 +0200705 depends on GENERATE_SMBIOS_TABLES
706 default MAINBOARD_PART_NUMBER
707 help
708 Override the default Product name stored in SMBIOS structures.
709
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100710config SMBIOS_ENCLOSURE_TYPE
711 hex
712 depends on GENERATE_SMBIOS_TABLES
713 default 0x09 if SYSTEM_TYPE_LAPTOP
Duncan Laurie8312df42019-02-01 11:33:57 -0800714 default 0x1e if SYSTEM_TYPE_TABLET
715 default 0x1f if SYSTEM_TYPE_CONVERTIBLE
716 default 0x20 if SYSTEM_TYPE_DETACHABLE
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100717 default 0x03
718 help
719 System Enclosure or Chassis Types as defined in SMBIOS specification.
Duncan Laurie8312df42019-02-01 11:33:57 -0800720 The default value is SMBIOS_ENCLOSURE_DESKTOP (0x03) but laptop,
721 convertible, or tablet enclosure will be used if the appropriate
722 system type is selected.
Julien Viard de Galbert9d231a92018-02-28 13:39:55 +0100723
Myles Watson45bb25f2009-09-22 18:49:08 +0000724endmenu
725
Martin Roth21c06502016-02-04 19:52:27 -0700726source "payloads/Kconfig"
Peter Stugea758ca22009-09-17 16:21:31 +0000727
Uwe Hermann168b11b2009-10-07 16:15:40 +0000728menu "Debugging"
729
Nico Huberd67edca2018-11-13 19:28:07 +0100730comment "CPU Debug Settings"
Arthur Heymansaae81902019-11-04 21:50:21 +0100731source "src/cpu/*/Kconfig.debug_cpu"
Nico Huberd67edca2018-11-13 19:28:07 +0100732
Arthur Heymans71bd7e42019-10-20 14:20:53 +0200733comment "BLOB Debug Settings"
734source "src/drivers/intel/fsp*/Kconfig.debug_blob"
735
Nico Huberd67edca2018-11-13 19:28:07 +0100736comment "General Debug Settings"
737
Uwe Hermann168b11b2009-10-07 16:15:40 +0000738# TODO: Better help text and detailed instructions.
Patrick Georgi0588d192009-08-12 15:00:51 +0000739config GDB_STUB
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000740 bool "GDB debugging support"
Rudolf Marek65888022012-03-25 20:51:16 +0200741 default n
Denis 'GNUtoo' Carikli3747ba12015-12-10 22:04:56 +0100742 depends on CONSOLE_SERIAL
Patrick Georgi0588d192009-08-12 15:00:51 +0000743 help
Uwe Hermann5ec2c2b2009-08-25 00:53:22 +0000744 If enabled, you will be able to set breakpoints for gdb debugging.
Stefan Reinauer8677a232010-12-11 20:33:41 +0000745 See src/arch/x86/lib/c_start.S for details.
Patrick Georgi0588d192009-08-12 15:00:51 +0000746
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200747config GDB_WAIT
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100748 bool "Wait for a GDB connection in the ramstage"
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200749 default n
750 depends on GDB_STUB
751 help
Denis 'GNUtoo' Carikli7d234f22015-12-10 21:58:52 +0100752 If enabled, coreboot will wait for a GDB connection in the ramstage.
753
Denis 'GNUtoo' Cariklie4cece02012-06-22 15:56:37 +0200754
Julius Wernerd82e0cf2015-02-17 17:27:23 -0800755config FATAL_ASSERTS
756 bool "Halt when hitting a BUG() or assertion error"
757 default n
758 help
759 If enabled, coreboot will call hlt() on a BUG() or failed ASSERT().
760
Nico Huber371a6672018-11-13 22:06:40 +0100761config HAVE_DEBUG_GPIO
762 bool
763
764config DEBUG_GPIO
765 bool "Output verbose GPIO debug messages"
766 depends on HAVE_DEBUG_GPIO
767
Stefan Reinauerfe422182012-05-02 16:33:18 -0700768config DEBUG_CBFS
769 bool "Output verbose CBFS debug messages"
770 default n
Stefan Reinauerfe422182012-05-02 16:33:18 -0700771 help
772 This option enables additional CBFS related debug messages.
773
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000774config HAVE_DEBUG_RAM_SETUP
775 def_bool n
776
Uwe Hermann01ce6012010-03-05 10:03:50 +0000777config DEBUG_RAM_SETUP
778 bool "Output verbose RAM init debug messages"
779 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000780 depends on HAVE_DEBUG_RAM_SETUP
Uwe Hermann01ce6012010-03-05 10:03:50 +0000781 help
782 This option enables additional RAM init related debug messages.
783 It is recommended to enable this when debugging issues on your
784 board which might be RAM init related.
785
786 Note: This option will increase the size of the coreboot image.
787
788 If unsure, say N.
789
Myles Watson80e914ff2010-06-01 19:25:31 +0000790config DEBUG_PIRQ
791 bool "Check PIRQ table consistency"
792 default n
793 depends on GENERATE_PIRQ_TABLE
794 help
795 If unsure, say N.
796
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000797config HAVE_DEBUG_SMBUS
798 def_bool n
799
Uwe Hermann01ce6012010-03-05 10:03:50 +0000800config DEBUG_SMBUS
801 bool "Output verbose SMBus debug messages"
802 default n
Jens Rottmann0d11f2d2010-08-26 12:46:02 +0000803 depends on HAVE_DEBUG_SMBUS
Uwe Hermann01ce6012010-03-05 10:03:50 +0000804 help
805 This option enables additional SMBus (and SPD) debug messages.
806
807 Note: This option will increase the size of the coreboot image.
808
809 If unsure, say N.
810
811config DEBUG_SMI
812 bool "Output verbose SMI debug messages"
813 default n
814 depends on HAVE_SMI_HANDLER
Nico Huber9e53db42018-06-05 22:34:08 +0200815 select SPI_FLASH_SMM if SPI_CONSOLE || CONSOLE_SPI_FLASH
Uwe Hermann01ce6012010-03-05 10:03:50 +0000816 help
817 This option enables additional SMI related debug messages.
818
819 Note: This option will increase the size of the coreboot image.
820
821 If unsure, say N.
822
Uwe Hermanna953f372010-11-10 00:14:32 +0000823# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
824# printk(BIOS_DEBUG, ...) calls.
825config DEBUG_MALLOC
Stefan Reinauer95a63962012-11-13 17:00:01 -0800826 prompt "Output verbose malloc debug messages" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
827 bool
Uwe Hermanna953f372010-11-10 00:14:32 +0000828 default n
Uwe Hermanna953f372010-11-10 00:14:32 +0000829 help
830 This option enables additional malloc related debug messages.
831
832 Note: This option will increase the size of the coreboot image.
833
834 If unsure, say N.
Cristian Măgherușan-Stanciu9f52ea42011-07-02 00:44:39 +0300835
Kyösti Mälkki66277952018-12-31 15:22:34 +0200836config DEBUG_CONSOLE_INIT
837 bool "Debug console initialisation code"
838 default n
839 help
840 With this option printk()'s are attempted before console hardware
841 initialisation has been completed. Your mileage may vary.
842
843 Typically you will need to modify source in console_hw_init() such
844 that a working console appears before the one you want to debug.
845
846 If unsure, say N.
847
Uwe Hermanna953f372010-11-10 00:14:32 +0000848# Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional
849# printk(BIOS_DEBUG, ...) calls.
Myles Watson6c9bc012010-09-07 22:30:15 +0000850config REALMODE_DEBUG
Stefan Reinauer95a63962012-11-13 17:00:01 -0800851 prompt "Enable debug messages for option ROM execution" if DEFAULT_CONSOLE_LOGLEVEL_7 || DEFAULT_CONSOLE_LOGLEVEL_8
852 bool
Myles Watson6c9bc012010-09-07 22:30:15 +0000853 default n
Peter Stuge5015f792010-11-10 02:00:32 +0000854 depends on PCI_OPTION_ROM_RUN_REALMODE
Myles Watson6c9bc012010-09-07 22:30:15 +0000855 help
856 This option enables additional x86emu related debug messages.
857
858 Note: This option will increase the time to emulate a ROM.
859
860 If unsure, say N.
861
Uwe Hermann01ce6012010-03-05 10:03:50 +0000862config X86EMU_DEBUG
863 bool "Output verbose x86emu debug messages"
864 default n
865 depends on PCI_OPTION_ROM_RUN_YABEL
866 help
867 This option enables additional x86emu related debug messages.
868
869 Note: This option will increase the size of the coreboot image.
870
871 If unsure, say N.
872
873config X86EMU_DEBUG_JMP
874 bool "Trace JMP/RETF"
875 default n
876 depends on X86EMU_DEBUG
877 help
878 Print information about JMP and RETF opcodes from x86emu.
879
880 Note: This option will increase the size of the coreboot image.
881
882 If unsure, say N.
883
884config X86EMU_DEBUG_TRACE
885 bool "Trace all opcodes"
886 default n
887 depends on X86EMU_DEBUG
888 help
889 Print _all_ opcodes that are executed by x86emu.
Stefan Reinauer14e22772010-04-27 06:56:47 +0000890
Uwe Hermann01ce6012010-03-05 10:03:50 +0000891 WARNING: This will produce a LOT of output and take a long time.
892
893 Note: This option will increase the size of the coreboot image.
894
895 If unsure, say N.
896
897config X86EMU_DEBUG_PNP
898 bool "Log Plug&Play accesses"
899 default n
900 depends on X86EMU_DEBUG
901 help
902 Print Plug And Play accesses made by option ROMs.
903
904 Note: This option will increase the size of the coreboot image.
905
906 If unsure, say N.
907
908config X86EMU_DEBUG_DISK
909 bool "Log Disk I/O"
910 default n
911 depends on X86EMU_DEBUG
912 help
913 Print Disk I/O related messages.
914
915 Note: This option will increase the size of the coreboot image.
916
917 If unsure, say N.
918
919config X86EMU_DEBUG_PMM
920 bool "Log PMM"
921 default n
922 depends on X86EMU_DEBUG
923 help
924 Print messages related to POST Memory Manager (PMM).
925
926 Note: This option will increase the size of the coreboot image.
927
928 If unsure, say N.
929
930
931config X86EMU_DEBUG_VBE
932 bool "Debug VESA BIOS Extensions"
933 default n
934 depends on X86EMU_DEBUG
935 help
936 Print messages related to VESA BIOS Extension (VBE) functions.
937
938 Note: This option will increase the size of the coreboot image.
939
940 If unsure, say N.
941
942config X86EMU_DEBUG_INT10
943 bool "Redirect INT10 output to console"
944 default n
945 depends on X86EMU_DEBUG
946 help
947 Let INT10 (i.e. character output) calls print messages to debug output.
948
949 Note: This option will increase the size of the coreboot image.
950
951 If unsure, say N.
952
953config X86EMU_DEBUG_INTERRUPTS
954 bool "Log intXX calls"
955 default n
956 depends on X86EMU_DEBUG
957 help
958 Print messages related to interrupt handling.
959
960 Note: This option will increase the size of the coreboot image.
961
962 If unsure, say N.
963
964config X86EMU_DEBUG_CHECK_VMEM_ACCESS
965 bool "Log special memory accesses"
966 default n
967 depends on X86EMU_DEBUG
968 help
969 Print messages related to accesses to certain areas of the virtual
970 memory (e.g. BDA (BIOS Data Area) or interrupt vectors)
971
972 Note: This option will increase the size of the coreboot image.
973
974 If unsure, say N.
975
976config X86EMU_DEBUG_MEM
977 bool "Log all memory accesses"
978 default n
979 depends on X86EMU_DEBUG
980 help
981 Print memory accesses made by option ROM.
982 Note: This also includes accesses to fetch instructions.
983
984 Note: This option will increase the size of the coreboot image.
985
986 If unsure, say N.
987
988config X86EMU_DEBUG_IO
989 bool "Log IO accesses"
990 default n
991 depends on X86EMU_DEBUG
992 help
993 Print I/O accesses made by option ROM.
994
995 Note: This option will increase the size of the coreboot image.
996
997 If unsure, say N.
998
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +0200999config X86EMU_DEBUG_TIMINGS
1000 bool "Output timing information"
1001 default n
Kyösti Mälkki91945fb2019-07-10 15:10:22 +03001002 depends on X86EMU_DEBUG && HAVE_MONOTONIC_TIMER
Denis 'GNUtoo' Carikli4cdc5d62013-05-15 00:19:49 +02001003 help
1004 Print timing information needed by i915tool.
1005
1006 If unsure, say N.
1007
Stefan Reinauer1c56d9b2012-05-10 11:27:32 -07001008config DEBUG_SPI_FLASH
1009 bool "Output verbose SPI flash debug messages"
1010 default n
1011 depends on SPI_FLASH
1012 help
1013 This option enables additional SPI flash related debug messages.
1014
Stefan Reinauer8e073822012-04-04 00:07:22 +02001015if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8
1016# Only visible with the right southbridge and loglevel.
1017config DEBUG_INTEL_ME
1018 bool "Verbose logging for Intel Management Engine"
1019 default n
1020 help
1021 Enable verbose logging for Intel Management Engine driver that
1022 is present on Intel 6-series chipsets.
1023endif
1024
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001025config TRACE
1026 bool "Trace function calls"
1027 default n
1028 help
1029 If enabled, every function will print information to console once
1030 the function is entered. The syntax is ~0xaaaabbbb(0xccccdddd)
1031 the 0xaaaabbbb is the actual function and 0xccccdddd is EIP
Ben Gardner8420ad42015-11-18 10:46:53 -06001032 of calling function. Please note some printk related functions
Rudolf Marek7f0e9302011-09-02 23:23:41 +02001033 are omitted from trace to have good looking console dumps.
Stefan Reinauerd37ab452012-12-18 16:23:28 -08001034
1035config DEBUG_COVERAGE
1036 bool "Debug code coverage"
1037 default n
1038 depends on COVERAGE
1039 help
1040 If enabled, the code coverage hooks in coreboot will output some
1041 information about the coverage data that is dumped.
1042
Jonathan Neuschäferfc04f9b2016-06-29 21:59:32 +02001043config DEBUG_BOOT_STATE
1044 bool "Debug boot state machine"
1045 default n
1046 help
1047 Control debugging of the boot state machine. When selected displays
1048 the state boundaries in ramstage.
1049
Nico Hubere84e62542016-10-05 17:43:56 +02001050config DEBUG_ADA_CODE
1051 bool "Compile debug code in Ada sources"
1052 default n
1053 help
1054 Add the compiler switch `-gnata` to compile code guarded by
1055 `pragma Debug`.
1056
Simon Glass46255f72018-07-12 15:26:07 -06001057config HAVE_EM100_SUPPORT
1058 bool "Platform can support the Dediprog EM100 SPI emulator"
1059 help
1060 This is enabled by platforms which can support using the EM100.
1061
1062config EM100
1063 bool "Configure image for EM100 usage"
1064 depends on HAVE_EM100_SUPPORT
1065 help
1066 The Dediprog EM100 SPI emulator allows fast loading of new SPI images
1067 over USB. However it only supports a maximum SPI clock of 20MHz and
1068 single data output. Enable this option to use a 20MHz SPI clock and
1069 disable "Dual Output Fast Read" Support.
1070
1071 On AMD platforms this changes the SPI speed at run-time if the
1072 mainboard code supports this. On supported Intel platforms this works
1073 by changing the settings in the descriptor.bin file.
1074
Uwe Hermann168b11b2009-10-07 16:15:40 +00001075endmenu
1076
Martin Roth8e4aafb2016-12-15 15:25:15 -07001077
1078###############################################################################
1079# Set variables with no prompt - these can be set anywhere, and putting at
1080# the end of this file gives the most flexibility.
Nico Huber3db76532017-05-18 18:07:34 +02001081
1082source "src/lib/Kconfig"
1083
Myles Watsond73c1b52009-10-26 15:14:07 +00001084config ENABLE_APIC_EXT_ID
1085 bool
1086 default n
Myles Watson2e672732009-11-12 16:38:03 +00001087
1088config WARNINGS_ARE_ERRORS
1089 bool
Edward O'Callaghan63f6dc72014-11-18 03:17:54 +11001090 default y
Patrick Georgi436f99b2009-11-27 16:55:13 +00001091
Peter Stuge51eafde2010-10-13 06:23:02 +00001092# The four POWER_BUTTON_DEFAULT_ENABLE, POWER_BUTTON_DEFAULT_DISABLE,
1093# POWER_BUTTON_FORCE_ENABLE and POWER_BUTTON_FORCE_DISABLE options are
1094# mutually exclusive. One of these options must be selected in the
1095# mainboard Kconfig if the chipset supports enabling and disabling of
1096# the power button. Chipset code uses the ENABLE_POWER_BUTTON option set
1097# in mainboard/Kconfig to know if the button should be enabled or not.
1098
1099config POWER_BUTTON_DEFAULT_ENABLE
1100 def_bool n
1101 help
1102 Select when the board has a power button which can optionally be
1103 disabled by the user.
1104
1105config POWER_BUTTON_DEFAULT_DISABLE
1106 def_bool n
1107 help
1108 Select when the board has a power button which can optionally be
1109 enabled by the user, e.g. when the board ships with a jumper over
1110 the power switch contacts.
1111
1112config POWER_BUTTON_FORCE_ENABLE
1113 def_bool n
1114 help
1115 Select when the board requires that the power button is always
1116 enabled.
1117
1118config POWER_BUTTON_FORCE_DISABLE
1119 def_bool n
1120 help
1121 Select when the board requires that the power button is always
1122 disabled, e.g. when it has been hardwired to ground.
1123
1124config POWER_BUTTON_IS_OPTIONAL
1125 bool
1126 default y if POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE
1127 default n if !(POWER_BUTTON_DEFAULT_ENABLE || POWER_BUTTON_DEFAULT_DISABLE)
1128 help
1129 Internal option that controls ENABLE_POWER_BUTTON visibility.
Duncan Laurie72748002013-10-31 08:26:23 -07001130
1131config REG_SCRIPT
1132 bool
Duncan Laurie72748002013-10-31 08:26:23 -07001133 default n
1134 help
1135 Internal option that controls whether we compile in register scripts.
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001136
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07001137config MAX_REBOOT_CNT
1138 int
1139 default 3
Timothy Pearson17ada2e2015-03-18 01:31:34 -05001140 help
1141 Internal option that sets the maximum number of bootblock executions allowed
1142 with the normal image enabled before assuming the normal image is defective
Vadim Bendebury9c9c3362014-07-23 09:40:02 -07001143 and switching to the fallback image.
Martin Roth59ff3402016-02-09 09:06:46 -07001144
Martin Roth8e4aafb2016-12-15 15:25:15 -07001145config UNCOMPRESSED_RAMSTAGE
1146 bool
1147
1148config NO_XIP_EARLY_STAGES
1149 bool
1150 default n if ARCH_X86
1151 default y
1152 help
1153 Identify if early stages are eXecute-In-Place(XIP).
1154
Martin Roth8e4aafb2016-12-15 15:25:15 -07001155config EARLY_CBMEM_LIST
1156 bool
1157 default n
1158 help
1159 Enable display of CBMEM during romstage and postcar.
1160
1161config RELOCATABLE_MODULES
1162 bool
1163 help
1164 If RELOCATABLE_MODULES is selected then support is enabled for
1165 building relocatable modules in the RAM stage. Those modules can be
1166 loaded anywhere and all the relocations are handled automatically.
1167
Martin Roth8e4aafb2016-12-15 15:25:15 -07001168config GENERIC_GPIO_LIB
1169 bool
1170 help
1171 If enabled, compile the generic GPIO library. A "generic" GPIO
1172 implies configurability usually found on SoCs, particularly the
1173 ability to control internal pull resistors.
1174
Martin Roth8e4aafb2016-12-15 15:25:15 -07001175config BOOTBLOCK_CUSTOM
1176 # To be selected by arch, SoC or mainboard if it does not want use the normal
1177 # src/lib/bootblock.c#main() C entry point.
1178 bool
1179
Martin Roth75e5cb72016-12-15 15:05:37 -07001180###############################################################################
1181# Set default values for symbols created before mainboards. This allows the
1182# option to be displayed in the general menu, but the default to be loaded in
1183# the mainboard if desired.
1184config COMPRESS_RAMSTAGE
1185 default y if !UNCOMPRESSED_RAMSTAGE
1186
1187config COMPRESS_PRERAM_STAGES
1188 depends on !ARCH_X86
1189 default y
1190
1191config INCLUDE_CONFIG_FILE
1192 default y
1193
Martin Roth75e5cb72016-12-15 15:05:37 -07001194config BOOTSPLASH_FILE
1195 depends on BOOTSPLASH_IMAGE
1196 default "bootsplash.jpg"
1197
1198config CBFS_SIZE
1199 default ROM_SIZE
Subrata Banikb5962a92019-06-08 12:29:02 +05301200
1201config HAVE_BOOTBLOCK
1202 bool
1203 default y
1204
1205config HAVE_VERSTAGE
1206 bool
1207 depends on VBOOT_SEPARATE_VERSTAGE
1208 default y
1209
1210config HAVE_ROMSTAGE
1211 bool
1212 default y
1213
Subrata Banikb5962a92019-06-08 12:29:02 +05301214config HAVE_RAMSTAGE
1215 bool
1216 default n if RAMPAYLOAD
1217 default y