blob: b11eda6360e21c1306e76c36a116a99fff0bd366 [file] [log] [blame]
Martin Roth5c354b92019-04-22 14:55:16 -06001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17/*
18 * Utilities for SMM setup
19 */
20
21#include <console/console.h>
Kyösti Mälkkic4fdb7b2019-08-10 15:51:59 +030022#include <cpu/x86/smm.h>
Martin Roth5c354b92019-04-22 14:55:16 -060023#include <amdblocks/acpimmio.h>
24#include <soc/southbridge.h>
25#include <soc/smi.h>
26
27void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
28{
29 printk(BIOS_DEBUG, "%s STUB!!!\n", __func__);
30}
31
32/** Set the EOS bit and enable SMI generation from southbridge */
33void enable_smi_generation(void)
34{
35 uint32_t reg = smi_read32(SMI_REG_SMITRIG0);
36 reg &= ~SMITRG0_SMIENB; /* Enable SMI generation */
37 reg |= SMITRG0_EOS; /* Set EOS bit */
38 smi_write32(SMI_REG_SMITRIG0, reg);
39}