blob: ad4f5f4ba6969a92a38d3cadb3ad9f8852fcbde2 [file] [log] [blame]
Patrick Georgi5726f922009-10-08 07:43:09 +00001config CPU_AMD_MODEL_10XXX
2 bool
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07003 select ARCH_BOOTBLOCK_X86_32
Stefan Reinauer77b16552015-01-14 19:51:47 +01004 select ARCH_VERSTAGE_X86_32
Furquan Shaikh99ac98f2014-04-23 10:18:48 -07005 select ARCH_ROMSTAGE_X86_32
6 select ARCH_RAMSTAGE_X86_32
Stefan Reinauera7acc512010-02-25 13:40:49 +00007 select SSE2
Stefan Reinauer0db68202012-08-07 14:44:51 -07008 select TSC_SYNC_LFENCE
Patrick Georgie135ac52012-11-20 11:53:47 +01009 select UDELAY_LAPIC
Kyösti Mälkki5fe1fb7a2013-12-08 07:21:05 +020010 select SUPPORT_CPU_UCODE_IN_CBFS
Nico Huberf5ca9222018-11-29 17:05:32 +010011 select CPU_MICROCODE_MULTIPLE_FILES
Kyösti Mälkki0f5e01a2019-08-09 07:11:07 +030012 select CAR_GLOBAL_MIGRATION
Patrick Georgi5726f922009-10-08 07:43:09 +000013
Patrick Georgi76e81522010-11-16 21:25:29 +000014if CPU_AMD_MODEL_10XXX
Kyösti Mälkki8b95c132013-07-07 11:30:48 +030015
Timothy Pearson323a2af2015-07-24 17:34:29 -050016config USE_LARGE_DCACHE
17 bool
18 default y if CPU_AMD_SOCKET_G34_NON_AGESA
Damien Zammitffc31d02016-02-10 13:59:21 +110019 default y if CPU_AMD_SOCKET_FM2_NON_AGESA
Timothy Pearson323a2af2015-07-24 17:34:29 -050020 default y if CPU_AMD_SOCKET_C32_NON_AGESA
21 default n
22
Ronald G. Minnichb5e777c2013-07-22 20:17:18 +020023config NUM_IPI_STARTS
24 int
25 default 1
26
Patrick Georgi5726f922009-10-08 07:43:09 +000027config CPU_ADDR_BITS
28 int
29 default 48
Patrick Georgi5726f922009-10-08 07:43:09 +000030
Patrick Georgi5726f922009-10-08 07:43:09 +000031config DCACHE_RAM_BASE
32 hex
Myles Watson3db199c2009-10-12 22:39:08 +000033 default 0xc4000
Patrick Georgi5726f922009-10-08 07:43:09 +000034
35config DCACHE_RAM_SIZE
36 hex
Myles Watson3db199c2009-10-12 22:39:08 +000037 default 0x0c000
Patrick Georgi5726f922009-10-08 07:43:09 +000038
Kyösti Mälkki184a1172019-08-15 15:37:30 +030039config DCACHE_BSP_TOP_STACK_SIZE
Timothy Pearsonb5e46552015-06-02 13:47:36 -050040 hex
Timothy Pearson8bd1c362015-06-02 20:18:44 -050041 default 0x4000
Timothy Pearsonb5e46552015-06-02 13:47:36 -050042
Kyösti Mälkki184a1172019-08-15 15:37:30 +030043config DCACHE_BSP_TOP_STACK_SLUSH
Timothy Pearsonfb39f822015-06-02 20:25:03 -050044 hex
Timothy Pearson323a2af2015-07-24 17:34:29 -050045 default 0x4000 if USE_LARGE_DCACHE
Timothy Pearsonfb39f822015-06-02 20:25:03 -050046 default 0x1000
47
Timothy Pearsonb5e46552015-06-02 13:47:36 -050048config DCACHE_AP_STACK_SIZE
49 hex
Timothy Pearson0df70462015-11-24 14:11:58 -060050 default 0x500
Timothy Pearsonb5e46552015-06-02 13:47:36 -050051
Patrick Georgi76e81522010-11-16 21:25:29 +000052config SET_FIDVID
53 bool
54 default y
55
Kyösti Mälkki46b09512014-04-17 15:07:47 +030056config MAX_PHYSICAL_CPUS
57 int
58 default 1
59
Stefan Reinauer95a63962012-11-13 17:00:01 -080060config LIFT_BSP_APIC_ID
61 bool
62 default n
63
Patrick Georgi76e81522010-11-16 21:25:29 +000064if SET_FIDVID
65config SET_FIDVID_DEBUG
66 bool
67 default y
68
69config SET_FIDVID_STORE_AP_APICID_AT_FIRST
70 bool
71 default y
72
73config SET_FIDVID_CORE0_ONLY
74 bool
75 default n
76
77# 0: all cores
78# 1: core 0 only
79# 2: all but core 0
80config SET_FIDVID_CORE_RANGE
81 int
82 default 0
83
Marc Jones90ca14d2011-11-23 17:49:19 -070084endif # SET_FIDVID
Xavi Drudis Ferran4c28a6f2011-02-26 23:29:44 +000085
Patrick Georgie135ac52012-11-20 11:53:47 +010086config UDELAY_LAPIC_FIXED_FSB
87 int
88 default 200
89
Marc Jones90ca14d2011-11-23 17:49:19 -070090endif # CPU_AMD_MODEL_10XXX