Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 1 | /* |
Stefan Reinauer | 7e61e45 | 2008-01-18 10:35:56 +0000 | [diff] [blame] | 2 | * This file is part of the coreboot project. |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 3 | * |
| 4 | * Copyright (C) 2007 Advanced Micro Devices, Inc. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; version 2 of the License. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 14 | */ |
| 15 | |
Patrick Georgi | c928a29 | 2010-05-14 11:02:56 +0000 | [diff] [blame] | 16 | #include <delay.h> |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 17 | |
| 18 | static void set_htic_bit(u8 i, u32 val, u8 bit) |
| 19 | { |
| 20 | u32 dword; |
| 21 | dword = pci_read_config32(NODE_PCI(i, 0), HT_INIT_CONTROL); |
| 22 | dword &= ~(1<<bit); |
| 23 | dword |= ((val & 1) <<bit); |
| 24 | pci_write_config32(NODE_PCI(i, 0), HT_INIT_CONTROL, dword); |
| 25 | } |
| 26 | |
Stefan Reinauer | 817d754 | 2010-07-08 00:37:23 +0000 | [diff] [blame] | 27 | #ifdef UNUSED_CODE |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 28 | static u32 get_htic_bit(u8 i, u8 bit) |
| 29 | { |
| 30 | u32 dword; |
| 31 | dword = pci_read_config32(NODE_PCI(i, 0), HT_INIT_CONTROL); |
| 32 | dword &= (1<<bit); |
| 33 | return dword; |
| 34 | } |
| 35 | |
| 36 | static void wait_till_sysinfo_in_ram(void) |
| 37 | { |
Elyes HAOUAS | 5a7e72f | 2016-08-23 21:36:02 +0200 | [diff] [blame] | 38 | while (1) { |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 39 | /* give the NB a break, many CPUs spinning on one bit makes a |
| 40 | * lot of traffic and time is not too important to APs. |
| 41 | */ |
Stefan Reinauer | 2d85fbed | 2010-04-14 15:44:21 +0000 | [diff] [blame] | 42 | udelay(1000); |
Elyes HAOUAS | 5a7e72f | 2016-08-23 21:36:02 +0200 | [diff] [blame] | 43 | if (get_htic_bit(0, 9)) return; |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 44 | } |
| 45 | } |
Stefan Reinauer | 817d754 | 2010-07-08 00:37:23 +0000 | [diff] [blame] | 46 | #endif |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 47 | |
| 48 | static void set_sysinfo_in_ram(u32 val) |
| 49 | { |
| 50 | set_htic_bit(0, val, 9); |
| 51 | } |
| 52 | |
| 53 | static void fill_mem_ctrl(u32 controllers, struct mem_controller *ctrl_a, const u8 *spd_addr) |
| 54 | { |
| 55 | int i; |
| 56 | int j; |
| 57 | int index = 0; |
| 58 | struct mem_controller *ctrl; |
Elyes HAOUAS | 04f8fd9 | 2016-09-19 10:24:34 -0600 | [diff] [blame^] | 59 | for (i = 0; i < controllers; i++) { |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 60 | ctrl = &ctrl_a[i]; |
| 61 | ctrl->node_id = i; |
| 62 | ctrl->f0 = NODE_PCI(i, 0); |
| 63 | ctrl->f1 = NODE_PCI(i, 1); |
| 64 | ctrl->f2 = NODE_PCI(i, 2); |
| 65 | ctrl->f3 = NODE_PCI(i, 3); |
| 66 | ctrl->f4 = NODE_PCI(i, 4); |
| 67 | ctrl->f5 = NODE_PCI(i, 5); |
| 68 | |
Elyes HAOUAS | 5a7e72f | 2016-08-23 21:36:02 +0200 | [diff] [blame] | 69 | if (spd_addr == (void *)0) continue; |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 70 | |
| 71 | ctrl->spd_switch_addr = spd_addr[index++]; |
| 72 | |
Elyes HAOUAS | 04f8fd9 | 2016-09-19 10:24:34 -0600 | [diff] [blame^] | 73 | for (j = 0; j < 8; j++) { |
Marc Jones | 8ae8c88 | 2007-12-19 01:32:08 +0000 | [diff] [blame] | 74 | ctrl->spd_addr[j] = spd_addr[index++]; |
| 75 | |
| 76 | } |
| 77 | } |
| 78 | } |