blob: c2293d56219ee42579ea7d89d77a5dec1023c88b [file] [log] [blame]
David Hendricks113ef812015-05-13 13:58:24 -07001{
2 /* two ELPIDA FA232A2MA-GC-F chips */
3 {
4 {
5 .rank = 0x2,
6 .col = 0xB,
7 .bk = 0x3,
8 .bw = 0x2,
9 .dbw = 0x2,
10 .row_3_4 = 0x0,
11 .cs0_row = 0xE,
12 .cs1_row = 0xE
13 },
14 {
15 .rank = 0x2,
16 .col = 0xB,
17 .bk = 0x3,
18 .bw = 0x2,
19 .dbw = 0x2,
20 .row_3_4 = 0x0,
21 .cs0_row = 0xE,
22 .cs1_row = 0xE
23 }
24 },
25 {
26 .togcnt1u = 0x215,
27 .tinit = 0xC8,
28 .trsth = 0x0,
29 .togcnt100n = 0x35,
30 .trefi = 0x26,
31 .tmrd = 0x2,
32 .trfc = 0x70,
33 .trp = 0x2000D,
34 .trtw = 0x6,
35 .tal = 0x0,
36 .tcl = 0x8,
37 .tcwl = 0x4,
38 .tras = 0x17,
39 .trc = 0x24,
40 .trcd = 0xD,
41 .trrd = 0x6,
42 .trtp = 0x4,
43 .twr = 0x8,
44 .twtr = 0x4,
45 .texsr = 0x76,
46 .txp = 0x4,
47 .txpdll = 0x0,
48 .tzqcs = 0x30,
49 .tzqcsi = 0x0,
50 .tdqs = 0x1,
51 .tcksre = 0x2,
52 .tcksrx = 0x2,
53 .tcke = 0x4,
54 .tmod = 0x0,
55 .trstl = 0x0,
56 .tzqcl = 0xC0,
57 .tmrr = 0x4,
58 .tckesr = 0x8,
59 .tdpd = 0x1F4
60 },
61 {
62 .dtpr0 = 0x48D7DD93,
63 .dtpr1 = 0x187008D8,
64 .dtpr2 = 0x121076,
65 .mr[0] = 0x0,
66 .mr[1] = 0xC3,
67 .mr[2] = 0x6,
jiazi Yang9c6d2b82015-11-09 14:07:31 +080068 /* 40 Ohms instead of 34.3 due to bad PCB routing on Mickey. */
69 .mr[3] = 0x2
David Hendricks113ef812015-05-13 13:58:24 -070070 },
71 .noc_timing = 0x20D266A4,
72 .noc_activate = 0x5B6,
73 .ddrconfig = 6,
74 .ddr_freq = 533*MHz,
75 .dramtype = LPDDR3,
76 .num_channels = 2,
77 .stride = 13,
jiazi Yang9c6d2b82015-11-09 14:07:31 +080078 .odt = 1
David Hendricks113ef812015-05-13 13:58:24 -070079},