blob: c549e70b51e67e4b4ada1aa0043644c2cd51f118 [file] [log] [blame]
David Hendricks113ef812015-05-13 13:58:24 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright 2014 Rockchip Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
David Hendricks113ef812015-05-13 13:58:24 -070014 */
15
16#include <boot/coreboot_tables.h>
David Hendricks113ef812015-05-13 13:58:24 -070017#include <gpio.h>
David Hendricks113ef812015-05-13 13:58:24 -070018#include <vendorcode/google/chromeos/chromeos.h>
19
20#include "board.h"
21
22#define GPIO_WP GPIO(7, A, 6)
David Hendricks113ef812015-05-13 13:58:24 -070023#define GPIO_RECOVERY GPIO(0, B, 1)
24
25void setup_chromeos_gpios(void)
26{
27 gpio_input(GPIO_WP);
David Hendricks113ef812015-05-13 13:58:24 -070028 gpio_input_pullup(GPIO_RECOVERY);
29}
30
31void fill_lb_gpios(struct lb_gpios *gpios)
32{
Julius Wernerc445b4f2016-03-31 17:27:05 -070033 struct lb_gpio chromeos_gpios[] = {
Joel Kitchingae0fb762019-04-07 00:37:14 +080034 {GPIO_WP.raw, ACTIVE_LOW,
35 !get_write_protect_state(), "write protect"},
Julius Wernerc445b4f2016-03-31 17:27:05 -070036 {GPIO_RECOVERY.raw, ACTIVE_LOW,
Matt Delco2cb39962019-04-30 14:59:43 -070037 !get_recovery_mode_switch(), "presence"},
Julius Wernerc445b4f2016-03-31 17:27:05 -070038 {GPIO_RESET.raw, ACTIVE_HIGH, -1, "reset"},
39 };
40 lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
David Hendricks113ef812015-05-13 13:58:24 -070041}
42
David Hendricks113ef812015-05-13 13:58:24 -070043int get_recovery_mode_switch(void)
44{
45 return !gpio_get(GPIO_RECOVERY);
46}
47
48int get_write_protect_state(void)
49{
50 return !gpio_get(GPIO_WP);
51}