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Gabe Blackd3163ab2013-05-16 05:53:40 -07001/*
2 * This file is part of the coreboot project.
3 *
David Hendricks1e3e2c52013-06-14 16:08:05 -07004 * Copyright 2013 Google Inc.
Gabe Blackd3163ab2013-05-16 05:53:40 -07005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Gabe Blackd3163ab2013-05-16 05:53:40 -070014 */
15
Julius Werner80af4422014-10-20 13:18:56 -070016#include <arch/cache.h>
17#include <arch/exception.h>
Gabe Blackd3163ab2013-05-16 05:53:40 -070018#include <armv7.h>
Aaron Durbin899d13d2015-05-15 23:39:23 -050019#include <boot_device.h>
Stefan Reinauer80e62932013-07-29 15:52:23 -070020#include <cbmem.h>
Aaron Durbindc9f5cd2015-09-08 13:34:43 -050021#include <commonlib/region.h>
Gabe Blackd3163ab2013-05-16 05:53:40 -070022#include <console/console.h>
Nico Huber0f2dd1e2017-08-01 14:02:40 +020023#include <device/i2c_simple.h>
Julius Werner80af4422014-10-20 13:18:56 -070024#include <drivers/maxim/max77802/max77802.h>
25#include <program_loading.h>
26#include <soc/clk.h>
27#include <soc/cpu.h>
28#include <soc/dmc.h>
29#include <soc/gpio.h>
30#include <soc/i2c.h>
31#include <soc/periph.h>
32#include <soc/power.h>
33#include <soc/setup.h>
34#include <soc/trustzone.h>
35#include <soc/wakeup.h>
36#include <stdlib.h>
37#include <timestamp.h>
38#include <types.h>
Gabe Blackd3163ab2013-05-16 05:53:40 -070039
David Hendricks77acf422013-08-05 21:04:16 -070040#define PMIC_I2C_BUS 4
41
David Hendricks1e3e2c52013-06-14 16:08:05 -070042struct pmic_write
43{
44 int or_orig; // Whether to or in the original value.
45 uint8_t reg; // Register to write.
46 uint8_t val; // Value to write.
47};
48
49/*
50 * Use read-modify-write for MAX77802 control registers and clobber the
51 * output voltage setting (BUCK?DVS?) registers.
52 */
53struct pmic_write pmic_writes[] =
54{
55 { 1, MAX77802_REG_PMIC_32KHZ, MAX77802_32KHCP_EN },
56 { 0, MAX77802_REG_PMIC_BUCK1DVS1, MAX77802_BUCK1DVS1_1V },
57 { 1, MAX77802_REG_PMIC_BUCK1CTRL, MAX77802_BUCK_TYPE1_ON |
58 MAX77802_BUCK_TYPE1_IGNORE_PWRREQ },
David Hendricks1f9f04e2013-08-01 18:57:52 -070059 { 0, MAX77802_REG_PMIC_BUCK2DVS1, MAX77802_BUCK2DVS1_1_2625V },
David Hendricks1e3e2c52013-06-14 16:08:05 -070060 { 1, MAX77802_REG_PMIC_BUCK2CTRL1, MAX77802_BUCK_TYPE2_ON |
61 MAX77802_BUCK_TYPE2_IGNORE_PWRREQ },
62 { 0, MAX77802_REG_PMIC_BUCK3DVS1, MAX77802_BUCK3DVS1_1V },
63 { 1, MAX77802_REG_PMIC_BUCK3CTRL1, MAX77802_BUCK_TYPE2_ON |
64 MAX77802_BUCK_TYPE2_IGNORE_PWRREQ },
65 { 0, MAX77802_REG_PMIC_BUCK4DVS1, MAX77802_BUCK4DVS1_1V },
66 { 1, MAX77802_REG_PMIC_BUCK4CTRL1, MAX77802_BUCK_TYPE2_ON |
67 MAX77802_BUCK_TYPE2_IGNORE_PWRREQ },
68 { 0, MAX77802_REG_PMIC_BUCK6DVS1, MAX77802_BUCK6DVS1_1V },
69 { 1, MAX77802_REG_PMIC_BUCK6CTRL, MAX77802_BUCK_TYPE1_ON |
Ronald G. Minnich88ac9b52013-06-26 17:28:52 -070070 MAX77802_BUCK_TYPE1_IGNORE_PWRREQ },
David Hendricks1f9f04e2013-08-01 18:57:52 -070071 /* Disable Boost(bypass) OUTPUT */
72 { 0, MAX77802_REG_PMIC_BOOSTCTRL, MAX77802_BOOSTCTRL_OFF},
David Hendricks1e3e2c52013-06-14 16:08:05 -070073};
74
David Hendricks77acf422013-08-05 21:04:16 -070075static int setup_power(int is_resume)
Gabe Blackd3163ab2013-05-16 05:53:40 -070076{
77 int error = 0;
David Hendricks1e3e2c52013-06-14 16:08:05 -070078 int i;
Gabe Blackd3163ab2013-05-16 05:53:40 -070079
80 power_init();
81
Hung-Te Linda7b8e42013-06-28 17:27:17 +080082 if (is_resume) {
David Hendricks77acf422013-08-05 21:04:16 -070083 return 0;
Hung-Te Linda7b8e42013-06-28 17:27:17 +080084 }
85
Gabe Blackd3163ab2013-05-16 05:53:40 -070086 /* Initialize I2C bus to configure PMIC. */
David Hendricks1e3e2c52013-06-14 16:08:05 -070087 exynos_pinmux_i2c4();
David Hendricks77acf422013-08-05 21:04:16 -070088 i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */
Gabe Blackd3163ab2013-05-16 05:53:40 -070089
David Hendricks1e3e2c52013-06-14 16:08:05 -070090 for (i = 0; i < ARRAY_SIZE(pmic_writes); i++) {
91 uint8_t data = 0;
92 uint8_t reg = pmic_writes[i].reg;
Gabe Blackd3163ab2013-05-16 05:53:40 -070093
David Hendricks1e3e2c52013-06-14 16:08:05 -070094 if (pmic_writes[i].or_orig)
Gabe Blackcdb61a62014-04-07 18:45:14 -070095 error |= i2c_readb(4, MAX77802_I2C_ADDR, reg, &data);
96
David Hendricks1e3e2c52013-06-14 16:08:05 -070097 data |= pmic_writes[i].val;
Gabe Blackcdb61a62014-04-07 18:45:14 -070098 error |= i2c_writeb(4, MAX77802_I2C_ADDR, reg, data);
Gabe Blackd3163ab2013-05-16 05:53:40 -070099 }
David Hendricks1e3e2c52013-06-14 16:08:05 -0700100
David Hendricks77acf422013-08-05 21:04:16 -0700101 return error;
Gabe Blackd3163ab2013-05-16 05:53:40 -0700102}
103
Hung-Te Linc357aed2013-06-24 20:02:01 +0800104static void setup_ec(void)
105{
106 /* SPI2 (EC) is slower and needs to work in half-duplex mode with
107 * single byte bus width. */
Gabe Black98018092013-07-24 06:18:20 -0700108 clock_set_rate(PERIPH_ID_SPI2, 5000000);
Hung-Te Linc357aed2013-06-24 20:02:01 +0800109 exynos_pinmux_spi2();
110}
111
Gabe Blackd3163ab2013-05-16 05:53:40 -0700112static void setup_gpio(void)
113{
Gabe Black63bb6102013-06-19 03:29:45 -0700114 gpio_direction_input(GPIO_X30); // WP_GPIO
115 gpio_set_pull(GPIO_X30, GPIO_PULL_NONE);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700116
Gabe Black63bb6102013-06-19 03:29:45 -0700117 gpio_direction_input(GPIO_X07); // RECMODE_GPIO
118 gpio_set_pull(GPIO_X07, GPIO_PULL_NONE);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700119
Gabe Black63bb6102013-06-19 03:29:45 -0700120 gpio_direction_input(GPIO_X34); // LID_GPIO
121 gpio_set_pull(GPIO_X34, GPIO_PULL_NONE);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700122
Gabe Black63bb6102013-06-19 03:29:45 -0700123 gpio_direction_input(GPIO_X12); // POWER_GPIO
124 gpio_set_pull(GPIO_X12, GPIO_PULL_NONE);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700125}
126
127static void setup_memory(struct mem_timings *mem, int is_resume)
128{
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700129 printk(BIOS_SPEW, "manufacturer: 0x%x type: 0x%x, div: 0x%x, mhz: %d\n",
Gabe Blackd3163ab2013-05-16 05:53:40 -0700130 mem->mem_manuf,
131 mem->mem_type,
132 mem->mpll_mdiv,
133 mem->frequency_mhz);
134
Gabe Blackd3163ab2013-05-16 05:53:40 -0700135 if (ddr3_mem_ctrl_init(mem, DMC_INTERLEAVE_SIZE, !is_resume)) {
136 die("Failed to initialize memory controller.\n");
137 }
138}
139
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700140#define PRIMITIVE_MEM_TEST 0
141#if PRIMITIVE_MEM_TEST
142static unsigned long primitive_mem_test(void)
Gabe Blackd3163ab2013-05-16 05:53:40 -0700143{
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700144 unsigned long *l = (void *)0x40000000;
145 int bad = 0;
146 unsigned long i;
147 for(i = 0; i < 256*1048576; i++){
148 if (! (i%1048576))
149 printk(BIOS_SPEW, "%lu ...", i);
150 l[i] = 0xffffffff - i;
Gabe Blackd3163ab2013-05-16 05:53:40 -0700151 }
Gabe Black5420e092013-05-17 11:29:22 -0700152
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700153 for(i = 0; i < 256*1048576; i++){
154 if (! (i%1048576))
155 printk(BIOS_SPEW, "%lu ...", i);
156 if (l[i] != (0xffffffff - i)){
157 printk(BIOS_SPEW, "%p: want %08lx got %08lx\n", l, l[i], 0xffffffff - i);
158 bad++;
159 }
160 }
Gabe Black5420e092013-05-17 11:29:22 -0700161
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700162 printk(BIOS_SPEW, "%d errors\n", bad);
163
164 return bad;
Gabe Blackd3163ab2013-05-16 05:53:40 -0700165}
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700166#else
167#define primitive_mem_test()
168#endif
169
170#define SIMPLE_SPI_TEST 0
171#if SIMPLE_SPI_TEST
172/* here is a simple SPI debug test, known to fid trouble */
173static void simple_spi_test(void)
174{
Aaron Durbin899d13d2015-05-15 23:39:23 -0500175 const struct region_device *boot_dev;
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700176 int i, amt = 4 * MiB, errors = 0;
177 //u32 *data = (void *)0x40000000;
178 u32 data[1024];
179 u32 in;
180
Aaron Durbin899d13d2015-05-15 23:39:23 -0500181 boot_device_init();
182 boot_dev = boot_device_ro();
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700183 amt = sizeof(data);
Aaron Durbin899d13d2015-05-15 23:39:23 -0500184 if (boot_dev == NULL) {
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700185 printk(BIOS_SPEW, "Failed to initialize default media.\n");
186 return;
187 }
188
Aaron Durbin899d13d2015-05-15 23:39:23 -0500189 if (rdev_readat(boot_dev, data, 0, amt) < amt) {
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700190 printk(BIOS_SPEW, "simple_spi_test fails\n");
191 return;
192 }
193
194
195 for(i = 0; i < amt; i += 4){
Aaron Durbin899d13d2015-05-15 23:39:23 -0500196 if (rdev_readat(boot_dev, &in, i, 4) < 4) {
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700197 printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i);
198 return;
199 }
200 if (data[i/4] != in){
201 errors++;
202 printk(BIOS_SPEW, "BAD at %d(%p):\nRAM %08lx\nSPI %08lx\n",
203 i, &data[i/4], (unsigned long)data[i/4], (unsigned long)in);
204 /* reread it to see which is wrong. */
Aaron Durbin899d13d2015-05-15 23:39:23 -0500205 if (rdev_readat(boot_dev, &in, i, 4) < 4) {
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700206 printk(BIOS_SPEW, "simple_spi_test fails at %d\n", i);
207 return;
208 }
209 printk(BIOS_SPEW, "RTRY at %d(%p):\nRAM %08lx\nSPI %08lx\n",
210 i, &data[i/4], (unsigned long)data[i/4], (unsigned long)in);
211 }
212
213 }
214 printk(BIOS_SPEW, "%d errors\n", errors);
215}
216#else
217#define simple_spi_test()
218#endif
Gabe Blackd3163ab2013-05-16 05:53:40 -0700219
220void main(void)
221{
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700222
223 extern struct mem_timings mem_timings;
Gabe Blackd3163ab2013-05-16 05:53:40 -0700224 int is_resume = (get_wakeup_state() != IS_NOT_WAKEUP);
David Hendricks77acf422013-08-05 21:04:16 -0700225 int power_init_failed;
226
Hung-Te Lin0682cfe2013-08-06 20:37:55 +0800227 exynos5420_config_smp();
David Hendricks77acf422013-08-05 21:04:16 -0700228 power_init_failed = setup_power(is_resume);
Gabe Blackd3163ab2013-05-16 05:53:40 -0700229
Kyösti Mälkkif48b38b2014-12-31 08:50:36 +0200230 timestamp_init(timestamp_get());
231 timestamp_add_now(TS_START_ROMSTAGE);
232
Gabe Blackd3163ab2013-05-16 05:53:40 -0700233 /* Clock must be initialized before console_init, otherwise you may need
234 * to re-initialize serial console drivers again. */
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700235 system_clock_init();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700236
Gabe Black136e7092013-08-09 00:31:09 -0700237 exynos_pinmux_uart3();
Stefan Reinauer998ab0d2013-05-20 12:29:37 -0700238 console_init();
Julius Werner85620db2013-11-13 18:22:15 -0800239 exception_init();
Stefan Reinauer998ab0d2013-05-20 12:29:37 -0700240
David Hendricks77acf422013-08-05 21:04:16 -0700241 if (power_init_failed)
Elyes HAOUAS08fc8ff2018-08-07 12:19:10 +0200242 die("Failed to initialize power.\n");
David Hendricks77acf422013-08-05 21:04:16 -0700243
244 /* re-initialize PMIC I2C channel after (re-)setting system clocks */
245 i2c_init(PMIC_I2C_BUS, 1000000, 0x00); /* 1MHz */
246
Kyösti Mälkkif48b38b2014-12-31 08:50:36 +0200247 timestamp_add_now(TS_BEFORE_INITRAM);
248
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700249 setup_memory(&mem_timings, is_resume);
250
Kyösti Mälkkif48b38b2014-12-31 08:50:36 +0200251 timestamp_add_now(TS_AFTER_INITRAM);
252
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700253 primitive_mem_test();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700254
Gabe Black8128a562013-09-18 05:48:37 -0700255 trustzone_init();
256
Gabe Blackd3163ab2013-05-16 05:53:40 -0700257 if (is_resume) {
258 wakeup();
259 }
260
Gabe Blackd3163ab2013-05-16 05:53:40 -0700261 setup_gpio();
Hung-Te Linc357aed2013-06-24 20:02:01 +0800262 setup_ec();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700263
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700264 simple_spi_test();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700265 /* Set SPI (primary CBFS media) clock to 50MHz. */
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700266 /* if this is uncommented SPI will not work correctly. */
Gabe Blackd3163ab2013-05-16 05:53:40 -0700267 clock_set_rate(PERIPH_ID_SPI1, 50000000);
Julius Werner45d2ff32013-08-12 18:04:06 -0700268 exynos_pinmux_spi1();
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700269 simple_spi_test();
Stefan Reinauer80e62932013-07-29 15:52:23 -0700270
271 cbmem_initialize_empty();
272
Ronald G. Minniche6af9292013-06-03 13:03:50 -0700273 simple_spi_test();
Kyösti Mälkkif48b38b2014-12-31 08:50:36 +0200274
Aaron Durbine4f3e7a2015-03-17 13:25:19 -0500275 run_ramstage();
Gabe Blackd3163ab2013-05-16 05:53:40 -0700276}