blob: 4cd0823ed3e8f49197427b931c539c6554ee9b89 [file] [log] [blame]
Shawn Nematbakhsh5725ea32015-04-01 16:52:37 -07001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2015 Google Inc. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
Shawn Nematbakhsh5725ea32015-04-01 16:52:37 -070014 */
15
16#include <arch/io.h>
17#include "ec.h"
18#include "ec_commands.h"
19
20enum {
21 /* 8-bit access */
22 ACCESS_TYPE_BYTE = 0x0,
23 /* 16-bit access */
24 ACCESS_TYPE_WORD = 0x1,
25 /* 32-bit access */
26 ACCESS_TYPE_LONG = 0x2,
27 /*
28 * 32-bit access, read or write of MEC_EMI_EC_DATA_B3 causes the
29 * EC data register to be incremented.
30 */
31 ACCESS_TYPE_LONG_AUTO_INCREMENT = 0x3,
32};
33
34/* EMI registers are relative to base */
Shawn Nematbakhsh5725ea32015-04-01 16:52:37 -070035#define MEC_EMI_HOST_TO_EC (MEC_EMI_BASE + 0)
36#define MEC_EMI_EC_TO_HOST (MEC_EMI_BASE + 1)
37#define MEC_EMI_EC_ADDRESS_B0 (MEC_EMI_BASE + 2)
38#define MEC_EMI_EC_ADDRESS_B1 (MEC_EMI_BASE + 3)
39#define MEC_EMI_EC_DATA_B0 (MEC_EMI_BASE + 4)
40#define MEC_EMI_EC_DATA_B1 (MEC_EMI_BASE + 5)
41#define MEC_EMI_EC_DATA_B2 (MEC_EMI_BASE + 6)
42#define MEC_EMI_EC_DATA_B3 (MEC_EMI_BASE + 7)
43
44/*
45 * cros_ec_lpc_mec_emi_write_address
46 *
47 * Initialize EMI read / write at a given address.
48 *
49 * @addr: Starting read / write address
50 * @access_mode: Type of access, typically 32-bit auto-increment
51 */
52static void mec_emi_write_address(u16 addr, u8 access_mode)
53{
54 /* Address relative to start of EMI range */
55 addr -= MEC_EMI_RANGE_START;
56 outb((addr & 0xfc) | access_mode, MEC_EMI_EC_ADDRESS_B0);
57 outb((addr >> 8) & 0x7f, MEC_EMI_EC_ADDRESS_B1);
58}
59
60/*
61 * mec_io_bytes - Read / write bytes to MEC EMI port
62 *
63 * @write: 1 on write operation, 0 on read
64 * @port: Base read / write address
65 * @length: Number of bytes to read / write
66 * @buf: Destination / source buffer
67 * @csum: Optional parameter, sums data transferred
68 *
69 */
70void mec_io_bytes(int write, u16 port, unsigned int length, u8 *buf, u8 *csum)
71{
72 int i = 0;
73 int io_addr;
Shawn Nematbakhsh16fb9b92015-04-21 09:30:10 -070074 u8 access_mode, new_access_mode;
Shawn Nematbakhsh5725ea32015-04-01 16:52:37 -070075
76 if (length == 0)
77 return;
78
Shawn Nematbakhsh16fb9b92015-04-21 09:30:10 -070079 /*
80 * Long access cannot be used on misaligned data since reading B0 loads
81 * the data register and writing B3 flushes it.
82 */
Jagadish Krishnamoorthyf4e9eb92015-07-18 11:46:37 -070083 if ((port & 0x3) || (length < 4))
Shawn Nematbakhsh16fb9b92015-04-21 09:30:10 -070084 access_mode = ACCESS_TYPE_BYTE;
85 else
86 access_mode = ACCESS_TYPE_LONG_AUTO_INCREMENT;
87
Shawn Nematbakhsh5725ea32015-04-01 16:52:37 -070088 /* Initialize I/O at desired address */
Shawn Nematbakhsh16fb9b92015-04-21 09:30:10 -070089 mec_emi_write_address(port, access_mode);
Shawn Nematbakhsh5725ea32015-04-01 16:52:37 -070090
91 /* Skip bytes in case of misaligned port */
92 io_addr = MEC_EMI_EC_DATA_B0 + (port & 0x3);
93 while (i < length) {
94 while (io_addr <= MEC_EMI_EC_DATA_B3) {
95 if (write)
96 outb(buf[i], io_addr++);
97 else
98 buf[i] = inb(io_addr++);
99 if (csum)
100 *csum += buf[i];
101
Shawn Nematbakhsh16fb9b92015-04-21 09:30:10 -0700102 port++;
Shawn Nematbakhsh5725ea32015-04-01 16:52:37 -0700103 /* Extra bounds check in case of misaligned length */
104 if (++i == length)
105 return;
106 }
107
Shawn Nematbakhsh16fb9b92015-04-21 09:30:10 -0700108 /*
109 * Use long auto-increment access except for misaligned write,
110 * since writing B3 triggers the flush.
111 */
112 if (length - i < 4 && write)
113 new_access_mode = ACCESS_TYPE_BYTE;
114 else
115 new_access_mode = ACCESS_TYPE_LONG_AUTO_INCREMENT;
116 if (new_access_mode != access_mode ||
117 access_mode != ACCESS_TYPE_LONG_AUTO_INCREMENT) {
118 access_mode = new_access_mode;
119 mec_emi_write_address(port, access_mode);
120 }
121
Shawn Nematbakhsh5725ea32015-04-01 16:52:37 -0700122 /* Access [B0, B3] on each loop pass */
123 io_addr = MEC_EMI_EC_DATA_B0;
124 }
125}