blob: 66043c8a499e102d81d29f58af79cd7e1dc6096d [file] [log] [blame]
Andrey Petrov42c4e882016-02-25 14:17:45 -08001/*
2 * This file is part of the coreboot project.
3 *
4 * Copyright (C) 2015 Intel Corp.
5 * (Written by Andrey Petrov <andrey.petrov@intel.com> for Intel Corp.)
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12
13#include <arch/cpu.h>
14#include <cbfs.h>
15#include <console/console.h>
16#include <fsp/api.h>
17#include <fsp/util.h>
18#include <string.h>
19
20struct fsp_header fsps_hdr;
21
22typedef asmlinkage enum fsp_status (*fsp_silicon_init_fn)
23 (void *silicon_upd);
24
25static enum fsp_status do_silicon_init(struct fsp_header *hdr)
26{
27 struct FSPS_UPD upd, *supd;
28 fsp_silicon_init_fn silicon_init;
29 enum fsp_status status;
30
31 supd = (struct FSPS_UPD *) (hdr->cfg_region_offset + hdr->image_base);
32
33 if (supd->FspUpdHeader.Signature != FSPS_UPD_SIGNATURE) {
34 printk(BIOS_ERR, "Invalid FSPS signature\n");
35 return FSP_INCOMPATIBLE_VERSION;
36 }
37
38 memcpy(&upd, supd, sizeof(upd));
39
40 /* Give SoC/mainboard a chance to populate entries */
41 platform_fsp_silicon_init_params_cb(&upd);
42
43 silicon_init = (void *) (hdr->image_base +
44 hdr->silicon_init_entry_offset);
45
46 status = silicon_init(&upd);
47 printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
48 return status;
49}
50
51enum fsp_status fsp_silicon_init(struct range_entry *range)
52{
53 /* Load FSP-S and save FSP header. We will need it for Notify */
54 /* TODO: do not hardcode CBFS file names */
55 if (fsp_load_binary(&fsps_hdr, "blobs/fsps.bin", range) != CB_SUCCESS)
56 return FSP_NOT_FOUND;
57
58 return do_silicon_init(&fsps_hdr);
59}