diff --git a/src/console/vtxprintf.c b/src/console/vtxprintf.c
index 2a51430..f8055da 100644
--- a/src/console/vtxprintf.c
+++ b/src/console/vtxprintf.c
@@ -244,7 +244,7 @@
 
 		case 'X':
 			flags |= LARGE;
-			/* fall through */
+			__fallthrough;
 		case 'x':
 			base = 16;
 			break;
@@ -252,6 +252,7 @@
 		case 'd':
 		case 'i':
 			flags |= SIGN;
+			__fallthrough;
 		case 'u':
 			break;
 
diff --git a/src/drivers/aspeed/common/ast_main.c b/src/drivers/aspeed/common/ast_main.c
index 021bf9a..8dccb45 100644
--- a/src/drivers/aspeed/common/ast_main.c
+++ b/src/drivers/aspeed/common/ast_main.c
@@ -212,7 +212,7 @@
 					ast->dp501_fw_addr = NULL;
 				}
 			}
-			/* fallthrough */
+			__fallthrough;
 		case 0x0c:
 			ast->tx_chip_type = AST_TX_DP501;
 		}
diff --git a/src/drivers/ipmi/ipmi_kcs_ops.c b/src/drivers/ipmi/ipmi_kcs_ops.c
index ff18766..4ffa91f 100644
--- a/src/drivers/ipmi/ipmi_kcs_ops.c
+++ b/src/drivers/ipmi/ipmi_kcs_ops.c
@@ -247,7 +247,7 @@
 		break;
 	default:
 		printk(BIOS_ERR, "IPMI: Unsupported register spacing for SPMI\n");
-		/* fall through */
+		__fallthrough;
 	case 1:
 		addr.bit_offset = 8;
 		break;
@@ -369,7 +369,7 @@
 		break;
 	default:
 		printk(BIOS_ERR, "IPMI: Unsupported register spacing for SMBIOS\n");
-		/* fall through */
+		__fallthrough;
 	case 1:
 		register_spacing = 0 << 6;
 		break;
diff --git a/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c b/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c
index 806e9b2..2130e33 100644
--- a/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c
+++ b/src/drivers/ti/sn65dsi86bridge/sn65dsi86bridge.c
@@ -301,13 +301,13 @@
 	default:
 		printk(BIOS_ERR, "Unexpected max rate (%#x); assuming 5.4 GHz\n",
 		       (int)dpcd_val);
-		/* fall through */
+		__fallthrough;
 	case DP_LINK_BW_5_4:
 		rate_valid[7] = 1;
-		/* fall through */
+		__fallthrough;
 	case DP_LINK_BW_2_7:
 		rate_valid[4] = 1;
-		/* fall through */
+		__fallthrough;
 	case DP_LINK_BW_1_62:
 		rate_valid[1] = 1;
 		break;
diff --git a/src/ec/google/chromeec/ec_acpi.c b/src/ec/google/chromeec/ec_acpi.c
index e344df0..bf224b0 100644
--- a/src/ec/google/chromeec/ec_acpi.c
+++ b/src/ec/google/chromeec/ec_acpi.c
@@ -111,7 +111,8 @@
 		return "BACK_LEFT";
 	case EC_PD_PORT_LOCATION_BACK_RIGHT:
 		return "BACK_RIGHT";
-	case EC_PD_PORT_LOCATION_UNKNOWN: /* intentional fallthrough */
+	case EC_PD_PORT_LOCATION_UNKNOWN:
+		__fallthrough;
 	default:
 		return "UNKNOWN";
 	}
diff --git a/src/ec/kontron/kempld/kempld.c b/src/ec/kontron/kempld/kempld.c
index 0489bac..31d927d 100644
--- a/src/ec/kontron/kempld/kempld.c
+++ b/src/ec/kontron/kempld/kempld.c
@@ -82,13 +82,13 @@
 				dev->ops = &kempld_uart_ops;
 				break;
 			}
-			/* Fall through. */
+			__fallthrough;
 		case 1:
 			if (dev->path.generic.subid == 0) {
 				kempld_i2c_device_init(dev);
 				break;
 			}
-			/* Fall through. */
+			__fallthrough;
 		default:
 			printk(BIOS_WARNING, "KEMPLD: Spurious device %s.\n", dev_path(dev));
 			break;
diff --git a/src/lib/dp_aux.c b/src/lib/dp_aux.c
index c6e2de2..6a925f1 100644
--- a/src/lib/dp_aux.c
+++ b/src/lib/dp_aux.c
@@ -20,13 +20,13 @@
 	case I2C_RAW_WRITE_AND_STOP:
 		if (!remaining_after_this)
 			return I2C_OVER_AUX_WRITE_MOT_0;
-		/* fallthrough */
+		__fallthrough;
 	case I2C_RAW_WRITE:
 		return I2C_OVER_AUX_WRITE_MOT_1;
 	case I2C_RAW_READ_AND_STOP:
 		if (!remaining_after_this)
 			return I2C_OVER_AUX_READ_MOT_0;
-		/* fallthrough */
+		__fallthrough;
 	case I2C_RAW_READ:
 		return I2C_OVER_AUX_READ_MOT_1;
 	case DPCD_WRITE:
diff --git a/src/lib/edid.c b/src/lib/edid.c
index 41b8031..06b9cee 100644
--- a/src/lib/edid.c
+++ b/src/lib/edid.c
@@ -1183,13 +1183,13 @@
 		switch (edid[0x13]) {
 		case 4:
 			c.claims_one_point_four = 1;
-			/* fall through */
+			__fallthrough;
 		case 3:
 			c.claims_one_point_three = 1;
-			/* fall through */
+			__fallthrough;
 		case 2:
 			c.claims_one_point_two = 1;
-			/* fall through */
+			__fallthrough;
 		default:
 			c.claims_one_point_oh = 1;
 		}
diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c
index 878f729e..25a8836 100644
--- a/src/lib/prog_loaders.c
+++ b/src/lib/prog_loaders.c
@@ -167,7 +167,8 @@
 		if (CONFIG(PAYLOAD_FIT_SUPPORT)) {
 			fit_payload(payload, mapping);
 			break;
-		} /* else fall-through */
+		}
+		__fallthrough;
 	default:
 		die_with_post_code(POST_INVALID_ROM,
 				   "Unsupported payload type %d.\n", payload->cbfs_type);
diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c
index a29b9f3..629469d 100644
--- a/src/mainboard/google/poppy/variants/nami/mainboard.c
+++ b/src/mainboard/google/poppy/variants/nami/mainboard.c
@@ -241,7 +241,7 @@
 	case SKU_6_SYNDRA:
 	case SKU_7_SYNDRA:
 		pl2_id = PL2_ID_SONA_SYNDRA;
-		/* fallthrough */
+		__fallthrough;
 	case SKU_0_VAYNE:
 	case SKU_1_VAYNE:
 	case SKU_2_VAYNE:
diff --git a/src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c
index b2a96a2..3934082 100644
--- a/src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c
+++ b/src/mainboard/lippert/frontrunner-af/variants/frontrunner-af/BiosCallOuts.c
@@ -38,7 +38,7 @@
 	case VOLT1_25: // board is not able to provide this
 		MemData->ParameterListPtr->DDR3Voltage = VOLT1_35; // sorry
 		printk(BIOS_INFO, "can't provide 1.25 V, using ");
-		// fall through
+		__fallthrough;
 	default: // AGESA.h says in mixed case 1.5V DIMMs get excluded
 	case VOLT1_35:
 		FCH_GPIO(184) = 0x08; // = output, disable PU, set to 0
diff --git a/src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c
index 4861809..f15db2f 100644
--- a/src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c
+++ b/src/mainboard/lippert/frontrunner-af/variants/toucan-af/BiosCallOuts.c
@@ -39,7 +39,7 @@
 	case VOLT1_25: // board is not able to provide this
 		MemData->ParameterListPtr->DDR3Voltage = VOLT1_35; // sorry
 		printk(BIOS_INFO, "can't provide 1.25 V, using ");
-		// fall through
+		__fallthrough;
 	default: // AGESA.h says in mixed case 1.5V DIMMs get excluded
 	case VOLT1_35:
 		FCH_GPIO(65) = 0x08; // = output, disable PU, set to 0
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index 8b5619c..cc820cd 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -275,7 +275,7 @@
 	/* MRC only supports fixed numbers of frequencies */
 	default:
 		printk(BIOS_WARNING, "RAMINIT: Limiting DDR3 clock to 800 Mhz\n");
-		/* fallthrough */
+		__fallthrough;
 	case 400:
 		pei_data->max_ddr3_freq = 800;
 		break;
diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c
index 9e56c68..9d34227 100644
--- a/src/soc/nvidia/tegra124/sor.c
+++ b/src/soc/nvidia/tegra124/sor.c
@@ -220,10 +220,10 @@
 		case 4:
 			reg_val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
 				NV_SOR_DP_PADCTL_PD_TXD_2_NO);
-			/* fall through */
+			__fallthrough;
 		case 2:
 			reg_val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
-			/* fall through */
+			__fallthrough;
 		case 1:
 			reg_val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
 			break;
@@ -891,10 +891,10 @@
 	case 4:
 		val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
 			NV_SOR_DP_PADCTL_PD_TXD_2_NO);
-		/* fall through */
+		__fallthrough;
 	case 2:
 		val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
-		/* fall through */
+		__fallthrough;
 	case 1:
 		val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
 		break;
diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c
index fe89d14..3b0c128 100644
--- a/src/soc/nvidia/tegra210/sor.c
+++ b/src/soc/nvidia/tegra210/sor.c
@@ -222,9 +222,10 @@
 		case 4:
 			reg_val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
 				NV_SOR_DP_PADCTL_PD_TXD_2_NO);
-			/* fall through */
+			fallthrough;
 		case 2:
 			reg_val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
+			fallthrough;
 		case 1:
 			reg_val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
 			break;
@@ -889,10 +890,10 @@
 	case 4:
 		val |= (NV_SOR_DP_PADCTL_PD_TXD_3_NO |
 			NV_SOR_DP_PADCTL_PD_TXD_2_NO);
-		/* fall through */
+		fallthrough;
 	case 2:
 		val |= NV_SOR_DP_PADCTL_PD_TXD_1_NO;
-		/* fall through */
+		fallthrough;
 	case 1:
 		val |= NV_SOR_DP_PADCTL_PD_TXD_0_NO;
 		break;
diff --git a/src/soc/rockchip/rk3288/sdram.c b/src/soc/rockchip/rk3288/sdram.c
index 877f53d..2efe19b 100644
--- a/src/soc/rockchip/rk3288/sdram.c
+++ b/src/soc/rockchip/rk3288/sdram.c
@@ -739,7 +739,7 @@
 				!= PGSR_DLDONE)
 				;
 			/* if at low power state, need wakeup first, then enter the config */
-			/* fall through */
+			__fallthrough;
 		case ACCESS:
 		case INIT_MEM:
 			write32(&ddr_pctl_regs->sctl, CFG_STATE);
@@ -893,7 +893,8 @@
 			while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK)
 				!= CONF)
 				;
-			/* fall through - enter config next to get to access state */
+			/* enter config next to get to access state */
+			__fallthrough;
 		case CONF:
 			write32(&ddr_pctl_regs->sctl, GO_STATE);
 			while ((read32(&ddr_pctl_regs->stat) & PCTL_STAT_MSK)
diff --git a/src/southbridge/amd/agesa/hudson/hudson.c b/src/southbridge/amd/agesa/hudson/hudson.c
index f1506bc..3c34e98 100644
--- a/src/southbridge/amd/agesa/hudson/hudson.c
+++ b/src/southbridge/amd/agesa/hudson/hudson.c
@@ -79,7 +79,7 @@
 	case PCI_DEVFN(0x12, 0):
 		if (dev->enabled == 0)
 			hudson_disable_usb(USB_EN_DEVFN_12_0);
-		/* fall through */
+		__fallthrough;
 	case PCI_DEVFN(0x12, 2):
 		if (dev->enabled == 0)
 			hudson_disable_usb(USB_EN_DEVFN_12_2);
@@ -87,7 +87,7 @@
 	case PCI_DEVFN(0x13, 0):
 		if (dev->enabled == 0)
 			hudson_disable_usb(USB_EN_DEVFN_13_0);
-		/* fall through */
+		__fallthrough;
 	case PCI_DEVFN(0x13, 2):
 		if (dev->enabled == 0)
 			hudson_disable_usb(USB_EN_DEVFN_13_2);
@@ -95,7 +95,7 @@
 	case PCI_DEVFN(0x16, 0):
 		if (dev->enabled == 0)
 			hudson_disable_usb(USB_EN_DEVFN_16_0);
-		/* fall through */
+		__fallthrough;
 	case PCI_DEVFN(0x16, 2):
 		if (dev->enabled == 0)
 			hudson_disable_usb(USB_EN_DEVFN_16_2);
diff --git a/src/southbridge/amd/agesa/hudson/lpc.c b/src/southbridge/amd/agesa/hudson/lpc.c
index 9bf928e..6a31fbf 100644
--- a/src/southbridge/amd/agesa/hudson/lpc.c
+++ b/src/southbridge/amd/agesa/hudson/lpc.c
@@ -290,10 +290,10 @@
 	switch (var_num) {
 	case 3:
 		pci_write_config16(dev, 0x90, reg_var[2]);
-		/* fall through */
+		__fallthrough;
 	case 2:
 		pci_write_config16(dev, 0x66, reg_var[1]);
-		/* fall through */
+		__fallthrough;
 	case 1:
 		pci_write_config16(dev, 0x64, reg_var[0]);
 		break;
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c
index a082e0c..de88d7c 100644
--- a/src/southbridge/amd/cimx/sb800/lpc.c
+++ b/src/southbridge/amd/cimx/sb800/lpc.c
@@ -158,10 +158,10 @@
 	switch (var_num) {
 	case 3:
 		pci_write_config16(dev, 0x90, reg_var[2]);
-		/* fall through */
+		__fallthrough;
 	case 2:
 		pci_write_config16(dev, 0x66, reg_var[1]);
-		/* fall through */
+		__fallthrough;
 	case 1:
 		//pci_write_config16(dev, 0x64, reg_var[0]); //cause filo can not find sata
 		break;
diff --git a/src/southbridge/amd/pi/hudson/lpc.c b/src/southbridge/amd/pi/hudson/lpc.c
index 784147c..05543cf 100644
--- a/src/southbridge/amd/pi/hudson/lpc.c
+++ b/src/southbridge/amd/pi/hudson/lpc.c
@@ -301,10 +301,10 @@
 	switch (var_num) {
 	case 3:
 		pci_write_config16(dev, 0x90, reg_var[2]);
-		/* fall through */
+		__fallthrough;
 	case 2:
 		pci_write_config16(dev, 0x66, reg_var[1]);
-		/* fall through */
+		__fallthrough;
 	case 1:
 		pci_write_config16(dev, 0x64, reg_var[0]);
 		break;
diff --git a/src/superio/nuvoton/nct5104d/superio.c b/src/superio/nuvoton/nct5104d/superio.c
index 1deda72..cfa2228 100644
--- a/src/superio/nuvoton/nct5104d/superio.c
+++ b/src/superio/nuvoton/nct5104d/superio.c
@@ -183,7 +183,7 @@
 	case NCT5104D_GPIO0:
 	case NCT5104D_GPIO1:
 		route_pins_to_uart(dev, false);
-		/* FALLTHROUGH */
+		__fallthrough;
 	case NCT5104D_GPIO6:
 		if (conf->reset_gpios)
 			reset_gpio_default_in(dev);