| commit | 63755128961089deba77413dad1f4f6d349a68f5 | [log] [tgz] |
|---|---|---|
| author | Aamir Bohra <aamir.bohra@intel.com> | Mon Feb 06 21:48:48 2017 +0530 |
| committer | Martin Roth <martinroth@google.com> | Wed Mar 22 17:42:18 2017 +0100 |
| tree | 37fb876dc738b9900ca4bc3a06a89dcfa8d3b5e0 | |
| parent | 8e1c12f12e3fb01d2228cca29de188507b3f2cc7 [diff] |
soc/intel/skylake: Add configs for enabling DCI and TraceHub Add configs for enabling Intel TraceHub and DCI for aid in debugging. Change-Id: Ic40f9499c0125070049856e242e89024ca5a1c4e Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Reviewed-on: https://review.coreboot.org/18791 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>