mb/google/rex: Add DTT thermal settings for thermal control
Add DTT thermal settings for thermal control provided by
thermal team for rex0 board
BRANCH=None
BUG=b:262498724, b:270664854
TEST=Built and verified thermal entries in ACPI SSDT on Rex board
Change-Id: I00dd97b759c8c68edaeeb4d64422b83c5e86981d
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71166
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
diff --git a/src/mainboard/google/rex/variants/rex0/overridetree.cb b/src/mainboard/google/rex/variants/rex0/overridetree.cb
index 282c3da..17e4c3e 100644
--- a/src/mainboard/google/rex/variants/rex0/overridetree.cb
+++ b/src/mainboard/google/rex/variants/rex0/overridetree.cb
@@ -133,6 +133,126 @@
device domain 0 on
device ref dtt on
chip drivers/intel/dptf
+ ## sensor information
+ register "options.tsr[0].desc" = ""DDR_SOC""
+ register "options.tsr[1].desc" = ""Ambient""
+ register "options.tsr[2].desc" = ""Charger""
+ register "options.tsr[3].desc" = ""wwan""
+
+ ## Active Policy
+ # FIXME: below values are initial reference values only
+ register "policies.active" = "{
+ [0] = {
+ .target = DPTF_TEMP_SENSOR_0,
+ .thresholds = {
+ TEMP_PCT(75, 90),
+ TEMP_PCT(70, 80),
+ TEMP_PCT(65, 70),
+ TEMP_PCT(60, 60),
+ TEMP_PCT(55, 50),
+ TEMP_PCT(50, 40),
+ TEMP_PCT(45, 30),
+ }
+ },
+ [1] = {
+ .target = DPTF_TEMP_SENSOR_1,
+ .thresholds = {
+ TEMP_PCT(75, 90),
+ TEMP_PCT(70, 80),
+ TEMP_PCT(65, 70),
+ TEMP_PCT(60, 60),
+ TEMP_PCT(55, 50),
+ TEMP_PCT(50, 40),
+ TEMP_PCT(45, 30),
+ }
+ },
+ [2] = {
+ .target = DPTF_TEMP_SENSOR_2,
+ .thresholds = {
+ TEMP_PCT(75, 90),
+ TEMP_PCT(70, 80),
+ TEMP_PCT(65, 70),
+ TEMP_PCT(60, 50),
+ }
+ },
+ [3] = {
+ .target = DPTF_TEMP_SENSOR_3,
+ .thresholds = {
+ TEMP_PCT(75, 90),
+ TEMP_PCT(70, 80),
+ TEMP_PCT(65, 70),
+ TEMP_PCT(60, 60),
+ TEMP_PCT(55, 50),
+ TEMP_PCT(50, 40),
+ TEMP_PCT(45, 30),
+ }
+ }
+ }"
+
+ ## Passive Policy
+ # TODO: below values are initial reference values only
+ register "policies.passive" = "{
+ [0] = DPTF_PASSIVE(CPU, CPU, 95, 5000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 80, 5000),
+ [2] = DPTF_PASSIVE(CPU, TEMP_SENSOR_1, 80, 5000),
+ [3] = DPTF_PASSIVE(CHARGER, TEMP_SENSOR_2, 75, 5000),
+ [4] = DPTF_PASSIVE(CPU, TEMP_SENSOR_3, 80, 5000),
+ }"
+
+ ## Critical Policy
+ # TODO: below values are initial reference values only
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 85, SHUTDOWN),
+ [2] = DPTF_CRITICAL(TEMP_SENSOR_1, 85, SHUTDOWN),
+ [3] = DPTF_CRITICAL(TEMP_SENSOR_2, 85, SHUTDOWN),
+ [4] = DPTF_CRITICAL(TEMP_SENSOR_3, 85, SHUTDOWN),
+ }"
+
+ ## Power Limits Control
+ register "controls.power_limits" = "{
+ .pl1 = {
+ .min_power = 15000,
+ .max_power = 15000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 200,
+ },
+ .pl2 = {
+ .min_power = 57000,
+ .max_power = 57000,
+ .time_window_min = 28 * MSECS_PER_SEC,
+ .time_window_max = 32 * MSECS_PER_SEC,
+ .granularity = 1000,
+ }
+ }"
+
+ ## Charger Performance Control (Control, mA)
+ register "controls.charger_perf" = "{
+ [0] = { 255, 3000 },
+ [1] = { 24, 1500 },
+ [2] = { 16, 1000 },
+ [3] = { 8, 500 }
+ }"
+
+ ## Fan Performance Control (Percent, Speed, Noise, Power)
+ register "controls.fan_perf" = "{
+ [0] = { 90, 6700, 220, 2200, },
+ [1] = { 80, 5800, 180, 1800, },
+ [2] = { 70, 5000, 145, 1450, },
+ [3] = { 60, 4900, 115, 1150, },
+ [4] = { 50, 3838, 90, 900, },
+ [5] = { 40, 2904, 55, 550, },
+ [6] = { 30, 2337, 30, 300, },
+ [7] = { 20, 1608, 15, 150, },
+ [8] = { 10, 800, 10, 100, },
+ [9] = { 0, 0, 0, 50, }
+ }"
+
+ ## Fan options
+ register "options.fan.fine_grained_control" = "1"
+ register "options.fan.step_size" = "2"
+
device generic 0 alias dptf_policy on end
end
end