| commit | ff61a39e90e0f8cb94a3dd015a2ebd6cae728cc6 | [log] [tgz] |
|---|---|---|
| author | Julius Werner <jwerner@chromium.org> | Tue Jan 12 15:21:03 2021 -0800 |
| committer | Julius Werner <jwerner@chromium.org> | Thu Feb 18 02:32:28 2021 +0000 |
| tree | a61e4d212aa5ac7522a337151bbea807403c7fbf | |
| parent | 84446e6e54fa9df42fcbb8450c9a071feaf1f8d0 [diff] |
cbfstool: Remove location pointer from parse_elf_to_stage() The *location argument to parse_elf_to_stage() is a relic from code all the way back to 2009 where this function was still used to parse XIP stages. Nowadays we have a separate parse_elf_to_xip_stage() for that, so there is no need to heed XIP concerns here. Having a pointer to represent the location in flash is absolutely irrelevant to a non-XIP stage, and it is used incorrectly -- we just get lucky that no code path in cbfstool can currently lead to that value being anything other than 0, otherwise the adjustment of data_start to be no lower than *location could easily screw things up. This patch removes it. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ia7f850c0edd7536ed3bef643efaae7271599313d Reviewed-on: https://review.coreboot.org/c/coreboot/+/49369 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload.
With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required.
coreboot was formerly known as LinuxBIOS.
After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot.
See https://www.coreboot.org/Payloads for a list of supported payloads.
coreboot supports a wide range of chipsets, devices, and mainboards.
For details please consult:
ANY_TOOLCHAIN Kconfig option if you're feeling lucky (no support in this case).Optional:
make menuconfig and make nconfig)Please consult https://www.coreboot.org/Build_HOWTO for details.
If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU.
Please see https://www.coreboot.org/QEMU for details.
Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website:
You can contact us directly on the coreboot mailing list:
https://www.coreboot.org/Mailinglist
The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details.
coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details.
This makes the resulting coreboot images licensed under the GPL, version 2.