tree 83c7baacab77251dc35374a7d168374340586ea4
parent 15e1d97463f8ae21010f6f6bf38659b6cae718b2
author Mario Scheithauer <mario.scheithauer@siemens.com> 1688031965 +0200
committer Felix Held <felix-coreboot@felixheld.de> 1688388549 +0000

mb/siemens/mc_apl1: Fix wrong register masking

With the previous instruction the complete register was set to '0'.
Correctly, only the bits 23:16 must be masked.

Change-Id: Idd6e70dcb42c69cf3bc5d36db993e6def52eba58
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76177
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jan Samek <jan.samek@siemens.com>