haswell/lynxpoint: Drop remaining uses of `ISLP` method
There's no need to dynamically differentiate between traditional and Low
Power platforms at runtime, and doing so makes code reuse more complex.
Change-Id: Id40f2f5f41db00487af9115eabee8874c2399030
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46785
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/haswell/acpi/ctdp.asl b/src/northbridge/intel/haswell/acpi/ctdp.asl
index 84c0f2f..47b7940 100644
--- a/src/northbridge/intel/haswell/acpi/ctdp.asl
+++ b/src/northbridge/intel/haswell/acpi/ctdp.asl
@@ -79,13 +79,13 @@
/* Calculate PL2 based on chip type */
Method (CPL2, 1, NotSerialized)
{
- If (\ISLP ()) {
- /* Haswell ULT PL2 = 25W */
- Return (25 * 8)
- } Else {
- /* Haswell Mobile PL2 = 1.25 * PL1 */
- Return ((Arg0 * 125) / 100)
- }
+#if CONFIG(INTEL_LYNXPOINT_LP)
+ /* Haswell ULT PL2 = 25W */
+ Return (25 * 8)
+#else
+ /* Haswell Mobile PL2 = 1.25 * PL1 */
+ Return ((Arg0 * 125) / 100)
+#endif
}
/* Set Config TDP Down */
diff --git a/src/southbridge/intel/lynxpoint/acpi/pch.asl b/src/southbridge/intel/lynxpoint/acpi/pch.asl
index 40d206d..6829cff 100644
--- a/src/southbridge/intel/lynxpoint/acpi/pch.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/pch.asl
@@ -10,12 +10,6 @@
Scope (\)
{
- // Return TRUE if chipset is LynxPoint-LP
- Method (ISLP, 0, NotSerialized)
- {
- Return (CONFIG(INTEL_LYNXPOINT_LP))
- }
-
// IO-Trap at 0x800. This is the ACPI->SMI communication interface.
OperationRegion (IO_T, SystemIO, 0x800, 0x10)
Field (IO_T, ByteAcc, NoLock, Preserve)
diff --git a/src/southbridge/intel/lynxpoint/acpi/xhci.asl b/src/southbridge/intel/lynxpoint/acpi/xhci.asl
index 65f1869..fbeb562 100644
--- a/src/southbridge/intel/lynxpoint/acpi/xhci.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/xhci.asl
@@ -213,26 +213,27 @@
^D0D3 = 0
}
- If (\ISLP ()) {
- // Clear PCI 0xB0[14:13]
- ^MB13 = 0
- ^MB14 = 0
+#if CONFIG(INTEL_LYNXPOINT_LP)
+ // Clear PCI 0xB0[14:13]
+ ^MB13 = 0
+ ^MB14 = 0
- // Clear MMIO 0x816C[14,2]
- CLK0 = 0
- CLK1 = 0
- }
+ // Clear MMIO 0x816C[14,2]
+ CLK0 = 0
+ CLK1 = 0
// Set MMIO 0x8154[31]
CLK2 = 1
- If (\ISLP ()) {
- // Handle per-port reset if needed
- LPS0 ()
+ // Handle per-port reset if needed
+ LPS0 ()
- // Set MMIO 0x80e0[15]
- AX15 = 1
- }
+ // Set MMIO 0x80e0[15]
+ AX15 = 1
+#else
+ // Set MMIO 0x8154[31]
+ CLK2 = 1
+#endif
Return ()
}
@@ -271,23 +272,24 @@
^D0D3 = 0
}
- If (\ISLP ()) {
- // Set PCI 0xB0[14:13]
- ^MB13 = 1
- ^MB14 = 1
+#if CONFIG(INTEL_LYNXPOINT_LP)
+ // Set PCI 0xB0[14:13]
+ ^MB13 = 1
+ ^MB14 = 1
- // Set MMIO 0x816C[14,2]
- CLK0 = 1
- CLK1 = 1
- }
+ // Set MMIO 0x816C[14,2]
+ CLK0 = 1
+ CLK1 = 1
// Clear MMIO 0x8154[31]
CLK2 = 0
- If (\ISLP ()) {
- // Clear MMIO 0x80e0[15]
- AX15 = 0
- }
+ // Clear MMIO 0x80e0[15]
+ AX15 = 0
+#else
+ // Clear MMIO 0x8154[31]
+ CLK2 = 0
+#endif
// Put device in D3
^D0D3 = 3