sb/intel/ibexpeak: Drop invalid ME finalisation function
Was copied from bd82x6x and none of the PCI IDs matches that of Ibex
Peak (PCI_DID_INTEL_IBEXPEAK_HECI1 = 0x3b64). Remove the code. This
allows dropping the me_8.x.c dependency, which never made sense.
Change-Id: I54df1e080048c0599dbee687ec617fb724cb6634
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49989
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc
index 643687f..c745b0a 100644
--- a/src/southbridge/intel/ibexpeak/Makefile.inc
+++ b/src/southbridge/intel/ibexpeak/Makefile.inc
@@ -13,7 +13,6 @@
ramstage-y += sata.c
ramstage-y += usb_ehci.c
ramstage-y += me.c
-ramstage-y += ../bd82x6x/me_8.x.c
ramstage-y += ../bd82x6x/me_common.c
ramstage-y += smbus.c
ramstage-y += thermal.c
@@ -26,7 +25,7 @@
ramstage-$(CONFIG_ELOG) += ../bd82x6x/elog.c
ramstage-y += madt.c
-smm-y += smihandler.c me.c ../bd82x6x/me_8.x.c ../bd82x6x/me_common.c
+smm-y += smihandler.c
romstage-y += early_pch.c
romstage-y +=../bd82x6x/early_me.c
diff --git a/src/southbridge/intel/ibexpeak/me.c b/src/southbridge/intel/ibexpeak/me.c
index a38e430..6a45fb4 100644
--- a/src/southbridge/intel/ibexpeak/me.c
+++ b/src/southbridge/intel/ibexpeak/me.c
@@ -322,84 +322,6 @@
return 0;
}
-/* Send END OF POST message to the ME */
-static int __unused mkhi_end_of_post(void)
-{
- struct mkhi_header mkhi = {
- .group_id = MKHI_GROUP_ID_GEN,
- .command = MKHI_END_OF_POST,
- };
- struct mei_header mei = {
- .is_complete = 1,
- .host_address = MEI_HOST_ADDRESS,
- .client_address = MEI_ADDRESS_MKHI,
- .length = sizeof(mkhi),
- };
-
- /* Send request and wait for response */
- if (mei_sendrecv(&mei, &mkhi, NULL, NULL, 0) < 0) {
- printk(BIOS_ERR, "ME: END OF POST message failed\n");
- return -1;
- }
-
- printk(BIOS_INFO, "ME: END OF POST message successful\n");
- return 0;
-}
-
-#ifdef __SIMPLE_DEVICE__
-
-static void intel_me7_finalize_smm(void)
-{
- struct me_hfs hfs;
- u32 reg32;
- u16 reg16;
-
- mei_base_address = (u32 *)(uintptr_t)
- (pci_read_config32(PCH_ME_DEV, PCI_BASE_ADDRESS_0) & ~0xf);
-
- /* S3 path will have hidden this device already */
- if (!mei_base_address || mei_base_address == (u32 *)0xfffffff0)
- return;
-
- /* Make sure ME is in a mode that expects EOP */
- reg32 = pci_read_config32(PCH_ME_DEV, PCI_ME_HFS);
- memcpy(&hfs, ®32, sizeof(u32));
-
- /* Abort and leave device alone if not normal mode */
- if (hfs.fpt_bad ||
- hfs.working_state != ME_HFS_CWS_NORMAL ||
- hfs.operation_mode != ME_HFS_MODE_NORMAL)
- return;
-
- /* Try to send EOP command so ME stops accepting other commands */
- mkhi_end_of_post();
-
- /* Make sure IO is disabled */
- reg16 = pci_read_config16(PCH_ME_DEV, PCI_COMMAND);
- reg16 &= ~(PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
- pci_write_config16(PCH_ME_DEV, PCI_COMMAND, reg16);
-
- /* Hide the PCI device */
- RCBA32_OR(FD2, PCH_DISABLE_MEI1);
-}
-
-void intel_me_finalize_smm(void)
-{
- u32 did = pci_read_config32(PCH_ME_DEV, PCI_VENDOR_ID);
- switch (did) {
- case 0x1c3a8086:
- intel_me7_finalize_smm();
- break;
- case 0x1e3a8086:
- intel_me8_finalize_smm();
- break;
- default:
- printk(BIOS_ERR, "No finalize handler for ME %08x.\n", did);
- }
-}
-#else /* !__SIMPLE_DEVICE__ */
-
/* Determine the path that we should take based on ME status */
static me_bios_path intel_me_path(struct device *dev)
{
@@ -599,5 +521,3 @@
.vendor = PCI_VENDOR_ID_INTEL,
.devices = pci_device_ids
};
-
-#endif /* !__SIMPLE_DEVICE__ */
diff --git a/src/southbridge/intel/ibexpeak/me.h b/src/southbridge/intel/ibexpeak/me.h
index 2466d02..5db5fee 100644
--- a/src/southbridge/intel/ibexpeak/me.h
+++ b/src/southbridge/intel/ibexpeak/me.h
@@ -229,9 +229,6 @@
int intel_early_me_uma_size(void);
int intel_early_me_init_done(u8 status);
-void intel_me_finalize_smm(void);
-void intel_me8_finalize_smm(void);
-
typedef struct {
u32 major_version : 16;
u32 minor_version : 16;
diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c
index 41f92b5..fe352777 100644
--- a/src/southbridge/intel/ibexpeak/smihandler.c
+++ b/src/southbridge/intel/ibexpeak/smihandler.c
@@ -148,7 +148,7 @@
void southbridge_finalize_all(void)
{
- intel_me_finalize_smm();
+ /* TODO: Finalize ME */
intel_pch_finalize_smm();
intel_ironlake_finalize_smm();
intel_model_2065x_finalize_smm();