Remove MAYBE_STATIC_BSS and ENV_STAGE_HAS_BSS_SECTION

After removal of CAR_MIGRATION there are no more reasons
to carry around ENV_STAGE_HAS_BSS_SECTION=n case.

Replace 'MAYBE_STATIC_BSS' with 'static' and remove explicit
zero-initializers.

Change-Id: I14dd9f52da5b06f0116bd97496cf794e5e71bc37
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40535
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index 0ea40d0..ddd4e7a 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -62,13 +62,11 @@
 
 	. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
 	_bss = .;
-#if ENV_STAGE_HAS_BSS_SECTION
 	/* Allow global uninitialized variables for stages without CAR teardown. */
 	*(.bss)
 	*(.bss.*)
 	*(.sbss)
 	*(.sbss.*)
-#endif
 	. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
 	_ebss = .;
 	_car_unallocated_start = .;
diff --git a/src/device/device_const.c b/src/device/device_const.c
index 3ad00f8..12d5386 100644
--- a/src/device/device_const.c
+++ b/src/device/device_const.c
@@ -227,7 +227,7 @@
 DEVTREE_CONST struct bus *pci_root_bus(void)
 {
 	DEVTREE_CONST struct device *pci_domain;
-	MAYBE_STATIC_BSS DEVTREE_CONST struct bus *pci_root = NULL;
+	static DEVTREE_CONST struct bus *pci_root;
 
 	if (pci_root)
 		return pci_root;
diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
index 5815e7c..0a73cb3 100644
--- a/src/drivers/pc80/rtc/option.c
+++ b/src/drivers/pc80/rtc/option.c
@@ -52,7 +52,7 @@
 static enum cb_err locate_cmos_layout(struct region_device *rdev)
 {
 	uint32_t cbfs_type = CBFS_COMPONENT_CMOS_LAYOUT;
-	MAYBE_STATIC_BSS struct cbfsf fh = {};
+	static struct cbfsf fh;
 
 	/*
 	 * In case VBOOT is enabled and this function is called from SMM,
diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c
index b964581..034e931 100644
--- a/src/ec/google/chromeec/ec.c
+++ b/src/ec/google/chromeec/ec.c
@@ -1343,7 +1343,7 @@
 /* Cache and retrieve the EC image type (ro or rw) */
 enum ec_image google_chromeec_get_current_image(void)
 {
-	MAYBE_STATIC_BSS enum ec_image ec_image_type = EC_IMAGE_UNKNOWN;
+	static enum ec_image ec_image_type = EC_IMAGE_UNKNOWN;
 
 	if (ec_image_type != EC_IMAGE_UNKNOWN)
 		return ec_image_type;
diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c
index 52b5e64..5306dcc 100644
--- a/src/ec/google/chromeec/ec_lpc.c
+++ b/src/ec/google/chromeec/ec_lpc.c
@@ -387,7 +387,7 @@
 
 int google_chromeec_command(struct chromeec_command *cec_command)
 {
-	MAYBE_STATIC_BSS int command_version = 0;
+	static int command_version;
 
 	if (command_version <= 0)
 		command_version = google_chromeec_command_version();
diff --git a/src/include/rules.h b/src/include/rules.h
index 6af25a9..614f37a 100644
--- a/src/include/rules.h
+++ b/src/include/rules.h
@@ -252,12 +252,9 @@
 #define ENV_CACHE_AS_RAM		(ENV_ROMSTAGE_OR_BEFORE && !CONFIG(RESET_VECTOR_IN_RAM))
 /* No .data sections with execute-in-place from ROM.  */
 #define ENV_STAGE_HAS_DATA_SECTION	!ENV_CACHE_AS_RAM
-/* No .bss sections for stage with CAR teardown. */
-#define ENV_STAGE_HAS_BSS_SECTION	1
 #else
 /* Both .data and .bss, sometimes SRAM not DRAM. */
 #define ENV_STAGE_HAS_DATA_SECTION	1
-#define ENV_STAGE_HAS_BSS_SECTION	1
 #define ENV_CACHE_AS_RAM		0
 #endif
 
diff --git a/src/include/stddef.h b/src/include/stddef.h
index e318309..b668b1a 100644
--- a/src/include/stddef.h
+++ b/src/include/stddef.h
@@ -41,12 +41,6 @@
 #define MAYBE_STATIC_NONZERO
 #endif
 
-#if ENV_STAGE_HAS_BSS_SECTION
-#define MAYBE_STATIC_BSS static
-#else
-#define MAYBE_STATIC_BSS
-#endif
-
 /* Provide a pointer to address 0 that thwarts any "accessing this is
  * undefined behaviour and do whatever" trickery in compilers.
  * Use when you _really_ need to read32(zeroptr) (ie. read address 0).
diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c
index 2f065ff..d06a9e9 100644
--- a/src/lib/imd_cbmem.c
+++ b/src/lib/imd_cbmem.c
@@ -19,7 +19,7 @@
 void *cbmem_top(void)
 {
 	if (ENV_ROMSTAGE) {
-		MAYBE_STATIC_BSS void *top = NULL;
+		static void *top;
 		if (top)
 			return top;
 		top = cbmem_top_chipset();
diff --git a/src/lib/lzma.c b/src/lib/lzma.c
index 16b6e22..d2e3e4b 100644
--- a/src/lib/lzma.c
+++ b/src/lib/lzma.c
@@ -26,7 +26,7 @@
 	int res;
 	CLzmaDecoderState state;
 	SizeT mallocneeds;
-	MAYBE_STATIC_BSS unsigned char scratchpad[15980];
+	static unsigned char scratchpad[15980];
 	const unsigned char *cp;
 
 	if (srcn < data_offset) {
diff --git a/src/lib/program.ld b/src/lib/program.ld
index b56a400..734f040 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -112,7 +112,7 @@
 }
 #endif
 
-#if ENV_STAGE_HAS_BSS_SECTION && !ENV_CACHE_AS_RAM
+#if !ENV_CACHE_AS_RAM
 .bss . : {
 	. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
 	_bss = .;
diff --git a/src/mainboard/google/stout/chromeos.c b/src/mainboard/google/stout/chromeos.c
index b67762e..dfab358 100644
--- a/src/mainboard/google/stout/chromeos.c
+++ b/src/mainboard/google/stout/chromeos.c
@@ -53,8 +53,8 @@
  */
 int get_recovery_mode_switch(void)
 {
-	MAYBE_STATIC_BSS int ec_in_rec_mode = 0;
-	MAYBE_STATIC_BSS int ec_rec_flag_good = 0;
+	static int ec_in_rec_mode;
+	static int ec_rec_flag_good;
 
 	if (ec_rec_flag_good)
 		return ec_in_rec_mode;
diff --git a/src/security/tpm/tspi/log.c b/src/security/tpm/tspi/log.c
index 07623f7..1d6f9ac 100644
--- a/src/security/tpm/tspi/log.c
+++ b/src/security/tpm/tspi/log.c
@@ -11,7 +11,7 @@
 
 static struct tcpa_table *tcpa_cbmem_init(void)
 {
-	MAYBE_STATIC_BSS struct tcpa_table *tclt = NULL;
+	static struct tcpa_table *tclt;
 	if (tclt)
 		return tclt;
 
@@ -32,7 +32,7 @@
 
 struct tcpa_table *tcpa_log_init(void)
 {
-	MAYBE_STATIC_BSS struct tcpa_table *tclt = NULL;
+	static struct tcpa_table *tclt;
 
 	/* We are dealing here with pre CBMEM environment.
 	 * If cbmem isn't available use CAR or SRAM */
diff --git a/src/soc/intel/baytrail/northcluster.c b/src/soc/intel/baytrail/northcluster.c
index b4bad8a..bb01844 100644
--- a/src/soc/intel/baytrail/northcluster.c
+++ b/src/soc/intel/baytrail/northcluster.c
@@ -51,7 +51,7 @@
 
 uint32_t nc_read_top_of_low_memory(void)
 {
-	MAYBE_STATIC_BSS uint32_t tolm = 0;
+	static uint32_t tolm;
 
 	if (tolm)
 		return tolm;
diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c
index 2070cd7..94b91cc 100644
--- a/src/soc/intel/braswell/northcluster.c
+++ b/src/soc/intel/braswell/northcluster.c
@@ -56,7 +56,7 @@
 
 uint32_t nc_read_top_of_low_memory(void)
 {
-	MAYBE_STATIC_BSS uint32_t tolm = 0;
+	static uint32_t tolm;
 
 	if (tolm)
 		return tolm;
diff --git a/toolchain.inc b/toolchain.inc
index 31d3e21..b680b1c 100644
--- a/toolchain.inc
+++ b/toolchain.inc
@@ -55,7 +55,7 @@
 # stack use, we use 1.5K as heuristic, assuming that we typically have lots
 # of tiny stack frames and the odd large one.
 #
-# Store larger buffers in BSS, use MAYBE_STATIC_BSS to share data in cache-as-ram
+# Store larger buffers in BSS, use static to share data in cache-as-ram
 # on x86.
 # Since GCCs detection of dynamic array bounds unfortunately seems to be
 # very basic, you'll sometimes have to use a static upper bound for the