Snow bootblock (bloated/debug version)
This is the bloated Snow bootblock which includes:
- SPI driver
- UART, including requisite I2C, Maxim PMIC, and clock config code.
- Adjustments for magic offsets (id section, stack pointer address)
This is just a temporary solution until we have romstage loading.
Once that happens, we'll rip out all but the code necessary for
copying SPI ROM content into SRAM.
Change-Id: I2a11e272eb9b6f626b5d9783eabb4a720a1d06be
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/2170
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
diff --git a/src/arch/armv7/Makefile.inc b/src/arch/armv7/Makefile.inc
index ca64f78..ecb5aee 100644
--- a/src/arch/armv7/Makefile.inc
+++ b/src/arch/armv7/Makefile.inc
@@ -259,7 +259,7 @@
ifeq ($(CONFIG_COMPILER_LLVM_CLANG),y)
$(LD) -m armelf_linux_eabi -static -o $@.tmp -L$(obj) $< -T $(objgenerated)/bootblock.ld
else
- $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld $<
+ $(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(objgenerated)/bootblock.ld -Wl,--start-group $< $(LIBGCC_FILE_NAME) -Wl,--end-group
endif
################################################################################
diff --git a/src/arch/armv7/bootblock_simple.c b/src/arch/armv7/bootblock_simple.c
index c10ee1f..6897e15 100644
--- a/src/arch/armv7/bootblock_simple.c
+++ b/src/arch/armv7/bootblock_simple.c
@@ -40,6 +40,7 @@
if (boot_cpu()) {
bootblock_mainboard_init();
+ bootblock_cpu_init();
}
entry = findstage(target1);
diff --git a/src/arch/armv7/lib/id.lds b/src/arch/armv7/lib/id.lds
index f2b794a..b521f39 100644
--- a/src/arch/armv7/lib/id.lds
+++ b/src/arch/armv7/lib/id.lds
@@ -1,6 +1,6 @@
SECTIONS {
/* FIXME: determine a sensible location... */
- . = (0x2024000) - (__id_end - __id_start);
+ . = (0x2026400);
.id (.): {
*(.id)
}
diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld
index 61e3479..d40d2ef 100644
--- a/src/arch/armv7/romstage.ld
+++ b/src/arch/armv7/romstage.ld
@@ -35,11 +35,11 @@
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
-ENTRY(_start)
+/* ENTRY(_start) */
SECTIONS
{
- . = CONFIG_ROMSTAGE_BASE;
+ . = 0x02023400 + 0x4000;
.romtext . : {
_rom = .;