| commit | 04c5bae39054aedbff1865d9dd2633260c23ece3 | [log] [tgz] |
|---|---|---|
| author | Duncan Laurie <dlaurie@chromium.org> | Mon Aug 13 09:37:42 2012 -0700 |
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | Mon Nov 12 04:21:59 2012 +0100 |
| tree | 21eb979f2c2341143be67decbcd25443108b6c27 | |
| parent | 2c485180a8613695b4886299efca4276fd17be31 [diff] |
Define post codes for OS boot and resume And move the pre-hardwaremain post code to 0x79 so it comes before hardwaremain at 0x80. Emit these codes from ACPI OS resume vector as well as the finalize step in bd82x6x southbridge. Change-Id: I7f258998a2f6549016e99b67bc21f7c59d2bcf9e Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/1702 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>