spi: Add function to read flash status register
Add a function that allows reading of the status register
from the SPI chip. This can be used to determine whether
write protection is enabled on the chip.
BUG=chrome-os-partner:35209
BRANCH=haswell
TEST=build and boot on peppy
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/240702
Reviewed-by: Shawn N <shawnn@chromium.org>
(cherry picked from commit c58f17689162b291a7cdb57649a237de21b73545)
Change-Id: Ib7fead2cc4ea4339ece322dd18403362c9c79c7d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 9fbdf0d72892eef4a742a418a347ecf650c01ea5
Original-Change-Id: I2541b22c51e43f7b7542ee0f48618cf411976a98
Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/241128
Original-Reviewed-by: Shawn N <shawnn@chromium.org>
Reviewed-on: http://review.coreboot.org/9730
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
diff --git a/src/drivers/spi/sst.c b/src/drivers/spi/sst.c
index ecd792d..aab654c 100644
--- a/src/drivers/spi/sst.c
+++ b/src/drivers/spi/sst.c
@@ -259,10 +259,12 @@
stm->flash.write = sst_write;
stm->flash.erase = spi_flash_cmd_erase;
+ stm->flash.status = spi_flash_cmd_status;
stm->flash.read = spi_flash_cmd_read_fast;
stm->flash.sector_size = SST_SECTOR_SIZE;
stm->flash.size = stm->flash.sector_size * params->nr_sectors;
stm->flash.erase_cmd = CMD_SST_SE;
+ stm->flash.status_cmd = CMD_SST_RDSR;
/* Flash powers up read-only, so clear BP# bits */
sst_unlock(&stm->flash);