nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree
Change-Id: I718d9dbc184c8bca38f452efea3202901018cb04
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69291
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/northbridge/intel/sandybridge/chipset.cb b/src/northbridge/intel/sandybridge/chipset.cb
index ae02a5b..e7ade19 100644
--- a/src/northbridge/intel/sandybridge/chipset.cb
+++ b/src/northbridge/intel/sandybridge/chipset.cb
@@ -2,6 +2,7 @@
chip northbridge/intel/sandybridge
device cpu_cluster 0 on
+ ops sandybridge_cpu_bus_ops
chip cpu/intel/model_206ax
# Magic APIC ID to locate this chip
device lapic 0 on end
@@ -14,5 +15,6 @@
end
device domain 0 on
+ ops sandybridge_pci_domain_ops
end
end