commit fa6014a6ec8253de8c86b0180221856a1398e70b
author Ben Gardner <gardner.ben@gmail.com> Tue Dec 08 21:20:25 2015 -0600
committer Martin Roth <martinroth@google.com> Wed Dec 16 01:10:06 2015 +0100
tree 55d71de574980b69930abed6bf3733050e6b69ac
parent 1e1c7ac3b4cb6d85eb602e04b0e4da8c042846c0

intel/fsp_baytrail: rename include folder baytrail to include/soc

This is to match the layout of the non-fsp baytrail to make comparisons
easier and possibly remove duplicate files.

Change-Id: I9a94842d724ab3826de711d398227e7bdc1045ff
Signed-off-by: Ben Gardner <gardner.ben@gmail.com>
Reviewed-on: https://review.coreboot.org/12686
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

src/mainboard/esd/atom15/romstage.c

diff --git a/src/mainboard/esd/atom15/romstage.c b/src/mainboard/esd/atom15/romstage.c
index 89fc9de..3aa02d8 100644
--- a/src/mainboard/esd/atom15/romstage.c
+++ b/src/mainboard/esd/atom15/romstage.c
@@ -15,12 +15,12 @@
  * GNU General Public License for more details.
  */
 
-#include <baytrail/romstage.h>
+#include <soc/romstage.h>
 #include <drivers/intel/fsp1_0/fsp_util.h>
 #include <pc80/mc146818rtc.h>
 #include <console/console.h>
-#include <baytrail/gpio.h>
-#include "chip.h"
+#include <soc/gpio.h>
+#include <soc/intel/fsp_baytrail/chip.h>
 
 /**
  * /brief mainboard call for setup that needs to be done before fsp init