nb/intel/sandybridge: Set up console in bootblock
Change-Id: Ia041b63201b2a4a2fe6ab11e3497c460f88061d1
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36784
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
diff --git a/src/mainboard/asus/h61m-cs/Makefile.inc b/src/mainboard/asus/h61m-cs/Makefile.inc
index af2b674..f0b34f9 100644
--- a/src/mainboard/asus/h61m-cs/Makefile.inc
+++ b/src/mainboard/asus/h61m-cs/Makefile.inc
@@ -1,3 +1,5 @@
bootblock-y += gpio.c
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/asus/h61m-cs/romstage.c b/src/mainboard/asus/h61m-cs/early_init.c
similarity index 95%
rename from src/mainboard/asus/h61m-cs/romstage.c
rename to src/mainboard/asus/h61m-cs/early_init.c
index 2aa243f..2720e7a 100644
--- a/src/mainboard/asus/h61m-cs/romstage.c
+++ b/src/mainboard/asus/h61m-cs/early_init.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
#include <device/pci_ops.h>
#include <device/pnp_ops.h>
@@ -44,7 +45,7 @@
{ 1, 0, 6 },
};
-void mainboard_config_superio(void)
+void bootblock_mainboard_early_init(void)
{
nuvoton_pnp_enter_conf_state(SIO_DEV);
pnp_set_logical_device(ACPI_DEV);
diff --git a/src/mainboard/asus/maximus_iv_gene-z/Makefile.inc b/src/mainboard/asus/maximus_iv_gene-z/Makefile.inc
index 0547b4d..be8d9c3 100644
--- a/src/mainboard/asus/maximus_iv_gene-z/Makefile.inc
+++ b/src/mainboard/asus/maximus_iv_gene-z/Makefile.inc
@@ -17,3 +17,5 @@
bootblock-y += gpio.c
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/asus/maximus_iv_gene-z/romstage.c b/src/mainboard/asus/maximus_iv_gene-z/early_init.c
similarity index 95%
rename from src/mainboard/asus/maximus_iv_gene-z/romstage.c
rename to src/mainboard/asus/maximus_iv_gene-z/early_init.c
index c1e3975..4b4fbbe 100644
--- a/src/mainboard/asus/maximus_iv_gene-z/romstage.c
+++ b/src/mainboard/asus/maximus_iv_gene-z/early_init.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <device/pnp_ops.h>
#include <device/pci_ops.h>
#include <device/dram/ddr3.h>
@@ -40,7 +41,7 @@
{ 1, 0, 6 },
};
-void mainboard_config_superio(void)
+void bootblock_mainboard_early_init(void)
{
static const pnp_devfn_t GLOBAL_PSEUDO_DEV = PNP_DEV(0x2e, 0);
static const pnp_devfn_t ACPI_DEV = PNP_DEV(0x2e, NCT6776_ACPI);
diff --git a/src/mainboard/asus/p8h61-m_lx/Makefile.inc b/src/mainboard/asus/p8h61-m_lx/Makefile.inc
index 9ee5136..28f5e60 100644
--- a/src/mainboard/asus/p8h61-m_lx/Makefile.inc
+++ b/src/mainboard/asus/p8h61-m_lx/Makefile.inc
@@ -17,3 +17,5 @@
bootblock-y += gpio.c
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/asus/p8h61-m_lx/romstage.c b/src/mainboard/asus/p8h61-m_lx/early_init.c
similarity index 95%
rename from src/mainboard/asus/p8h61-m_lx/romstage.c
rename to src/mainboard/asus/p8h61-m_lx/early_init.c
index d336191..7dc8cd5 100644
--- a/src/mainboard/asus/p8h61-m_lx/romstage.c
+++ b/src/mainboard/asus/p8h61-m_lx/early_init.c
@@ -14,6 +14,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <device/pci_ops.h>
#include <device/dram/ddr3.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
@@ -47,7 +48,7 @@
CNF1_LPC_EN | KBC_LPC_EN | LPT_LPC_EN | COMA_LPC_EN);
}
-void mainboard_config_superio(void)
+void bootblock_mainboard_early_init(void)
{
nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
}
diff --git a/src/mainboard/asus/p8h61-m_pro/Makefile.inc b/src/mainboard/asus/p8h61-m_pro/Makefile.inc
index 620a9c0..e402ffa 100644
--- a/src/mainboard/asus/p8h61-m_pro/Makefile.inc
+++ b/src/mainboard/asus/p8h61-m_pro/Makefile.inc
@@ -2,3 +2,5 @@
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/asus/p8h61-m_pro/romstage.c b/src/mainboard/asus/p8h61-m_pro/early_init.c
similarity index 96%
rename from src/mainboard/asus/p8h61-m_pro/romstage.c
rename to src/mainboard/asus/p8h61-m_pro/early_init.c
index ff5a677..4b02505 100644
--- a/src/mainboard/asus/p8h61-m_pro/romstage.c
+++ b/src/mainboard/asus/p8h61-m_pro/early_init.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <device/pci_ops.h>
#include <device/pnp_ops.h>
#include <northbridge/intel/sandybridge/raminit_native.h>
@@ -49,7 +50,7 @@
{ 1, 0, 6 },
};
-void mainboard_config_superio(void)
+void bootblock_mainboard_early_init(void)
{
/* Enable UART */
nuvoton_pnp_enter_conf_state(GLOBAL_DEV);
diff --git a/src/mainboard/asus/p8z77-m_pro/Makefile.inc b/src/mainboard/asus/p8z77-m_pro/Makefile.inc
index 8fc0ead..e9fbd3c 100644
--- a/src/mainboard/asus/p8z77-m_pro/Makefile.inc
+++ b/src/mainboard/asus/p8z77-m_pro/Makefile.inc
@@ -18,3 +18,5 @@
romstage-y += gpio.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+bootblock-y += early_init.c
+romstage-y += early_init.c
diff --git a/src/mainboard/asus/p8z77-m_pro/romstage.c b/src/mainboard/asus/p8z77-m_pro/early_init.c
similarity index 98%
rename from src/mainboard/asus/p8z77-m_pro/romstage.c
rename to src/mainboard/asus/p8z77-m_pro/early_init.c
index 4963c31..ce479a8 100644
--- a/src/mainboard/asus/p8z77-m_pro/romstage.c
+++ b/src/mainboard/asus/p8z77-m_pro/early_init.c
@@ -13,6 +13,7 @@
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
+#include <bootblock_common.h>
#include <device/pci_ops.h>
#include <device/pnp_ops.h>
#include <northbridge/intel/sandybridge/sandybridge.h>
@@ -48,7 +49,7 @@
{ 0, 2, 6 } /* Port 13: Unused. Asus propietary DEBUG_PORT ??? */
};
-void mainboard_config_superio(void)
+void bootblock_mainboard_early_init(void)
{
/* Setup COM/UART */
nuvoton_pnp_enter_conf_state(GLOBAL_DEV);