drivers/spi: Add controller protection type
Some SPI controllers support both READ and WRITE protection
add a variable to the protect API for the callers to specify
the kind of protection they want (Read/Write/Both).
Also, update the callers and protect API implementation.
BUG=None
BRANCH=None
TEST=test that the mrc cache is protected as expected on soraka.
Also tried if the read protection is applied correctly.
Change-Id: I093884c4768b08a378f21242ac82e430ac013d15
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/30559
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c
index 4579b19..65708a6 100644
--- a/src/soc/intel/common/block/fast_spi/fast_spi_flash.c
+++ b/src/soc/intel/common/block/fast_spi/fast_spi_flash.c
@@ -367,11 +367,13 @@
* Protected Range (FPR) register if available.
*/
static int fast_spi_flash_protect(const struct spi_flash *flash,
- const struct region *region)
+ const struct region *region,
+ const enum ctrlr_prot_type type)
{
u32 start = region_offset(region);
u32 end = start + region_sz(region) - 1;
u32 reg;
+ u32 protect_mask = 0;
int fpr;
uintptr_t fpr_base;
BOILERPLATE_CREATE_CTX(ctx);
@@ -391,13 +393,28 @@
return -1;
}
+ switch (type) {
+ case WRITE_PROTECT:
+ protect_mask |= SPI_FPR_WPE;
+ break;
+ case READ_PROTECT:
+ protect_mask |= SPI_FPR_RPE;
+ break;
+ case READ_WRITE_PROTECT:
+ protect_mask |= (SPI_FPR_RPE | SPI_FPR_WPE);
+ break;
+ default:
+ printk(BIOS_ERR, "ERROR: Seeking invalid protection!\n");
+ return -1;
+ }
+
/* Set protected range base and limit */
- reg = SPI_FPR(start, end) | SPI_FPR_WPE;
+ reg = SPI_FPR(start, end) | protect_mask;
/* Set the FPR register and verify it is protected */
write32((void *)fpr_base, reg);
reg = read32((void *)fpr_base);
- if (!(reg & SPI_FPR_WPE)) {
+ if (!(reg & protect_mask)) {
printk(BIOS_ERR, "ERROR: Unable to set SPI FPR %d\n", fpr);
return -1;
}