commit f95b9b4b092837663b6fa1cf42ce312338dee5c3
author Angel Pons <th3fanbus@gmail.com> Wed Jan 20 01:10:48 2021 +0100
committer Patrick Georgi <pgeorgi@google.com> Fri Feb 12 07:52:25 2021 +0000
tree f6357a2e6b866a1bad014f17f946cc68b7ecd7e0
parent ea573b04d8da056ce41833975cadf58df843c01e

nb/intel/haswell: Use common {DMI,EP,MCH}BAR accessors

Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.

Change-Id: I3ff4577ce662697cb3d8fb34003217fd6275dd42
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49749
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>

src/northbridge/intel/haswell/haswell.h

diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h
index f6678ca..f158c21 100644
--- a/src/northbridge/intel/haswell/haswell.h
+++ b/src/northbridge/intel/haswell/haswell.h
@@ -34,9 +34,8 @@
  * MCHBAR
  */
 
-#define MCHBAR8(x)  (*((volatile u8  *)(DEFAULT_MCHBAR + (x))))
-#define MCHBAR16(x) (*((volatile u16 *)(DEFAULT_MCHBAR + (x))))
-#define MCHBAR32(x) (*((volatile u32 *)(DEFAULT_MCHBAR + (x))))
+#include <northbridge/intel/common/fixed_bars.h>
+
 #define MCHBAR8_AND(x,  and) (MCHBAR8(x)  = MCHBAR8(x)  & (and))
 #define MCHBAR16_AND(x, and) (MCHBAR16(x) = MCHBAR16(x) & (and))
 #define MCHBAR32_AND(x, and) (MCHBAR32(x) = MCHBAR32(x) & (and))
@@ -62,10 +61,7 @@
  * EPBAR - Egress Port Root Complex Register Block
  */
 
-#define EPBAR8(x)  *((volatile u8  *)(DEFAULT_EPBAR + (x)))
-#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + (x)))
-#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + (x)))
-#define EPBAR64(x) *((volatile u64 *)(DEFAULT_EPBAR + (x)))
+#define EPBAR64(x) (*((volatile u64 *)((uintptr_t)CONFIG_FIXED_EPBAR_MMIO_BASE + (x))))
 
 #include "registers/epbar.h"
 
@@ -73,10 +69,7 @@
  * DMIBAR
  */
 
-#define DMIBAR8(x)  *((volatile u8  *)(DEFAULT_DMIBAR + (x)))
-#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + (x)))
-#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + (x)))
-#define DMIBAR64(x) *((volatile u64 *)(DEFAULT_DMIBAR + (x)))
+#define DMIBAR64(x) (*((volatile u64 *)((uintptr_t)CONFIG_FIXED_DMIBAR_MMIO_BASE + (x))))
 
 #include "registers/dmibar.h"