mb/google/guybrush/bootblock: add comment on selecting eSPI interface
Setting the PM_ESPI_CS_USE_DATA2 bit in PM_SPI_PAD_PU_PD results in the
eSPI transactions being sent via the SPI2 pins instead of the SPI1 pins.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iad8e3a48496a52c14c936ab77c75dc1b403f47bb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58876
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
diff --git a/src/mainboard/google/guybrush/bootblock.c b/src/mainboard/google/guybrush/bootblock.c
index 83ac43a..187b2ef 100644
--- a/src/mainboard/google/guybrush/bootblock.c
+++ b/src/mainboard/google/guybrush/bootblock.c
@@ -63,6 +63,7 @@
/* Early eSPI interface configuration */
+ /* Use SPI2 pins for eSPI */
dword = pm_read32(PM_SPI_PAD_PU_PD);
dword |= PM_ESPI_CS_USE_DATA2;
pm_write32(PM_SPI_PAD_PU_PD, dword);