soc/amd/common/block/psp: Add psp_set_tpm_irq_gpio
The PSP currently uses a hard coded GPIO for the TPM IRQ. Not all board
versions use the same GPIO. This method allows the mainboard to pass
in the correct GPIO.
BUG=b:241824257
TEST=Boot guybrush and verify PSP message prints
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Ie05d095d7f141d6a526d08fbf25eb2652e96aa49
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66614
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h
index c9986ca..abdb762 100644
--- a/src/soc/amd/common/block/include/amdblocks/psp.h
+++ b/src/soc/amd/common/block/include/amdblocks/psp.h
@@ -75,4 +75,7 @@
int psp_load_named_blob(enum psp_blob_type type, const char *name);
+/* Sets the GPIO used for the TPM IRQ */
+void psp_set_tpm_irq_gpio(unsigned int gpio);
+
#endif /* AMD_BLOCK_PSP_H */
diff --git a/src/soc/amd/common/block/psp/Makefile.inc b/src/soc/amd/common/block/psp/Makefile.inc
index 5dd7fdd..c3b0161 100644
--- a/src/soc/amd/common/block/psp/Makefile.inc
+++ b/src/soc/amd/common/block/psp/Makefile.inc
@@ -23,6 +23,7 @@
romstage-y += psp_gen2.c
ramstage-y += psp_gen2.c
ramstage-$(CONFIG_PSP_PLATFORM_SECURE_BOOT) += psb.c
+ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_I2C3_TPM_SHARED_WITH_PSP) += tpm.c
smm-y += psp_gen2.c
smm-y += psp_smm_gen2.c
diff --git a/src/soc/amd/common/block/psp/psp_def.h b/src/soc/amd/common/block/psp/psp_def.h
index 6dcf5b4..1d87878 100644
--- a/src/soc/amd/common/block/psp/psp_def.h
+++ b/src/soc/amd/common/block/psp/psp_def.h
@@ -20,6 +20,7 @@
#define MBOX_BIOS_CMD_PSB_AUTO_FUSING 0x21
#define MBOX_BIOS_CMD_SET_SPL_FUSE 0x2d
#define MBOX_BIOS_CMD_QUERY_SPL_FUSE 0x47
+#define MBOX_BIOS_CMD_I2C_TPM_ARBITRATION 0x64
#define MBOX_BIOS_CMD_ABORT 0xfe
/* x86 to PSP commands, v1-only */
@@ -81,6 +82,23 @@
uint32_t spl_value;
} __attribute__((packed, aligned(32)));
+struct dtpm_config {
+ uint32_t gpio;
+} __packed;
+
+enum dtpm_request_type {
+ DTPM_REQUEST_ACQUIRE, /* Acquire I2C bus */
+ DTPM_REQUEST_RELEASE, /* Release I2C bus */
+ DTPM_REQUEST_CONFIG, /* Provide DTPM info */
+ DTPM_REQUEST_MAX,
+};
+
+struct mbox_cmd_dtpm_config_buffer {
+ struct mbox_buffer_header header;
+ uint32_t request_type;
+ struct dtpm_config config;
+} __packed __aligned(32);
+
#define PSP_INIT_TIMEOUT 10000 /* 10 seconds */
#define PSP_CMD_TIMEOUT 1000 /* 1 second */
diff --git a/src/soc/amd/common/block/psp/tpm.c b/src/soc/amd/common/block/psp/tpm.c
new file mode 100644
index 0000000..3fd50ea
--- /dev/null
+++ b/src/soc/amd/common/block/psp/tpm.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <amdblocks/psp.h>
+#include <console/console.h>
+#include <types.h>
+#include "psp_def.h"
+
+void psp_set_tpm_irq_gpio(unsigned int gpio)
+{
+ int cmd_status;
+ struct mbox_cmd_dtpm_config_buffer buffer = {
+ .header = {
+ .size = sizeof(buffer)
+ },
+ .request_type = DTPM_REQUEST_CONFIG,
+ .config = {
+ .gpio = gpio
+ }
+ };
+
+ printk(BIOS_DEBUG, "PSP: Setting TPM GPIO to %u...", gpio);
+
+ cmd_status = send_psp_command(MBOX_BIOS_CMD_I2C_TPM_ARBITRATION, &buffer);
+
+ psp_print_cmd_status(cmd_status, &buffer.header);
+}