soc/intel/apollolake: Enable RAM cache for cbmem region in ramstage

Use postcar infrastructure to enable caching of area where ramstage
runs.

Change-Id: I3f2f6e82f3b9060c7350ddff754cd3dbcf457671
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14095
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
1 file changed