mb/scaleway/tagada: Update gpio configuration to use intelblock
Update the gpio configuration structure to the intelblock format.
The resulting configuration is functionally similar (even if some
bits are not identical).
Change-Id: Ide515424c6e1b0cb560b52a7f12909f23fd41e06
Signed-off-by: Julien Viard de Galbert <jviarddegalbert@online.net>
Reviewed-on: https://review.coreboot.org/25424
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/src/mainboard/scaleway/tagada/romstage.c b/src/mainboard/scaleway/tagada/romstage.c
index 630d355..c29ff9d 100644
--- a/src/mainboard/scaleway/tagada/romstage.c
+++ b/src/mainboard/scaleway/tagada/romstage.c
@@ -31,7 +31,7 @@
void mainboard_config_gpios(void)
{
size_t num;
- const struct dnv_pad_config *table;
+ const struct pad_config *table;
printk(BIOS_SPEW, "Board Serial: %s.\n", bmcinfo_serial());
/* Configure pads prior to SiliconInit() in case there's any
@@ -47,7 +47,7 @@
printk(BIOS_INFO, "GPIO table: 0x%x, entry num: 0x%x!\n",
(uint32_t)table, (uint32_t)num);
- gpio_configure_dnv_pads(table, num);
+ gpio_configure_pads(table, num);
}
void mainboard_memory_init_params(FSPM_UPD *mupd)