tree a41f4eaf7222a8b8fade27c9b64a9347a4c8fdf4
parent 7a63f48a5439cffb8b8d5d3ac49fc64ddff0948b
author Sean Rhodes <sean@starlabs.systems> 1629891055 +0100
committer Nick Vaccaro <nvaccaro@google.com> 1633114408 +0000

soc/tigerlake: Make IO decode / enable register configurable

This allows the one 32bit register to be configured in the
devicetree in the same way that Skylake can be.
i.e. register "lpc_ioe".

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: Ib1a7f2707e565a5651ebe438320de9597f5742c3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57140
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>