exynos5420: Setup clocks for MMC bus controller.
To configure source clocks on Exynos 5420 for MMC drivers.
Some registers are different from the 5250. FSYS now has two parts
and MMC uses FSYS2. The MMC block uses MPLL as the clock source.
The "high-speed" MMC interface runs as 52MHz, so divider is set
accordingly.
Also, the MMC driver has changed from MSHCI (Mobile Storage Host Controller
Interface) to DWMCI (DesignWare MMC Controller Interface).
Change-Id: I9ba9cf43e2f2dcd9da747888c0c7676bd545177b
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/60858
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/4354
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c
index 765ff82..7ead3c9 100644
--- a/src/mainboard/google/pit/romstage.c
+++ b/src/mainboard/google/pit/romstage.c
@@ -113,17 +113,12 @@
static void setup_storage(void)
{
/* MMC0: Fixed, 8 bit mode, connected with GPIO. */
- if (clock_set_mshci(PERIPH_ID_SDMMC0))
+ if (clock_set_dwmci(PERIPH_ID_SDMMC0))
printk(BIOS_CRIT, "%s: Failed to set MMC0 clock.\n", __func__);
- if (gpio_direction_output(MMC0_GPIO_PIN, 1)) {
- printk(BIOS_CRIT, "%s: Unable to power on MMC0.\n", __func__);
- }
- gpio_set_pull(MMC0_GPIO_PIN, GPIO_PULL_NONE);
- gpio_set_drv(MMC0_GPIO_PIN, GPIO_DRV_4X);
exynos_pinmux_sdmmc0();
/* MMC2: Removable, 4 bit mode, no GPIO. */
- clock_set_mshci(PERIPH_ID_SDMMC2);
+ clock_set_dwmci(PERIPH_ID_SDMMC2);
exynos_pinmux_sdmmc2();
}