soc/intel/common/block/cpu: Add option to skip coreboot AP init
SoC users from IOTG team is looking forward for a solution to skip
coreboot AP initialization flow and make use of FSPS-UPD to
perform AP reset.
TEST=Assign use_fsp_mp_init=1 to ensure coreboot is not bringing APs
out of reset.
Change-Id: Ibc8cd411e802fb682436a933073922b2693ba994
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/26644
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 31b6b17..081bba3 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -28,9 +28,10 @@
#include <device/device.h>
#include <device/pci.h>
#include <intelblocks/acpi.h>
+#include <intelblocks/chip.h>
#include <intelblocks/fast_spi.h>
-#include <intelblocks/p2sb.h>
#include <intelblocks/msr.h>
+#include <intelblocks/p2sb.h>
#include <intelblocks/xdci.h>
#include <fsp/api.h>
#include <fsp/util.h>
@@ -614,7 +615,7 @@
if (!IS_ENABLED(CONFIG_SOC_INTEL_GLK))
silconfig->MonitorMwaitEnable = 0;
- silconfig->SkipMpInit = !cfg->use_fsp_mp_init;
+ silconfig->SkipMpInit = !chip_get_fsp_mp_init();
/* Disable setting of EISS bit in FSP. */
silconfig->SpiEiss = 0;
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index 4f586ac..61ddeda 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -150,13 +150,6 @@
* (1) Power
* (2) Power & Performance */
enum pnp_settings pnp_settings;
-
- /*
- * Option for mainboard to skip coreboot MP initialization
- * 0 = Make use of coreboot MP Init
- * 1 = Make use of FSP MP Init
- */
- uint8_t use_fsp_mp_init;
};
typedef struct soc_intel_apollolake_config config_t;