tree c13ac96afb425ed4f17f798075dd0599694ea91b
parent d0f971fe9a5d3c081d932a767b7373acc5f00b4a
author Angel Pons <th3fanbus@gmail.com> 1615976699 +0100
committer Patrick Georgi <pgeorgi@google.com> 1616658710 +0000

nb/intel/haswell: Move USB config API into Lynx Point

Both EHCI and xHCI USB controllers are inside the PCH (southbridge).
Now that mainboard USB configuration no longer depends on pei_data.h
definitions, the API declarations can be placed in southbridge code.

Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical.

Change-Id: Ia21991b225482b33c5bc0dc52884674d301b28ba
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51569
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>