soc/intel/alderlake: Enable debug driver for Alder Lake platform
The patch enables dynamic debug capability driver for Alder Lake
platform.
BUG=b:153410586
TEST= Build code for Brya
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Change-Id: Ic4df3d7f3d6585bd37c632b1a3f0a47c94b63697
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62652
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 3570f27..6b0a27a 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -98,6 +98,7 @@
select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
select SOC_INTEL_COMMON_BLOCK_XHCI
select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
+ select SOC_INTEL_COMMON_BASECODE
select SOC_INTEL_COMMON_FSP_RESET
select SOC_INTEL_COMMON_PCH_BASE
select SOC_INTEL_COMMON_RESET
diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c
index 5e79535..3f29fc3 100644
--- a/src/soc/intel/alderlake/romstage/romstage.c
+++ b/src/soc/intel/alderlake/romstage/romstage.c
@@ -9,6 +9,7 @@
#include <intelblocks/pmclib.h>
#include <intelblocks/smbus.h>
#include <intelblocks/thermal.h>
+#include <intelbasecode/debug_feature.h>
#include <memory_info.h>
#include <soc/intel/common/smbios.h>
#include <soc/iomap.h>
@@ -134,6 +135,9 @@
/* Initialize HECI interface */
heci_init(HECI1_BASE_ADDRESS);
+ if (CONFIG(SOC_INTEL_COMMON_BASECODE_DEBUG_FEATURE))
+ pre_mem_debug_init();
+
s3wake = pmc_fill_power_state(ps) == ACPI_S3;
if (CONFIG(SOC_INTEL_CSE_LITE_SKU) && !s3wake) {